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* drm/amdgpu: still cleanup sid.hAlexandre Demers2025-04-081-16/+0
| | | | | | | | The defines, shifts and masks are already available in dce_6_0_d.h, dce_6_0_sh_mask.h. Signed-off-by: Alexandre Demers <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: huge sid.h cleanup, drop substituted defines.Alexandre Demers2025-04-071-1209/+2
| | | | | | | Now that we are using the proper defines, cleanup useless old "substituted" defines. Signed-off-by: Alexandre Demers <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: continue cleaning up sid.h and si_enums.hAlexandre Demers2025-04-071-3/+13
| | | | | | | | Remove more duplicated defines and move some in sid.h for coherence with CIK. Signed-off-by: Alexandre Demers <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: cleanup DCE6 a bit moreAlexandre Demers2025-04-071-4/+0
| | | | | | | Use shifts already available in DCE6's defines, masks and shifts. Signed-off-by: Alexandre Demers <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: keep removing sid.h dependency from si_dma.cAlexandre Demers2025-04-071-2/+0
| | | | | | | | Move and rename DMA_SEM_INCOMPLETE_TIMER_CNTL and DMA_SEM_WAIT_FAIL_TIMER_CNTL in oss_1_0_d.h Signed-off-by: Alexandre Demers <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: move si_dma.c away from sid.h and si_enums.hAlexandre Demers2025-04-071-36/+0
| | | | | | | | | Replace defines for the ones in oss_1_0_d.h and oss_1_0_sh_mask.h Taking the opportunity to add some comments taken from cik_sdma.c Signed-off-by: Alexandre Demers <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: move DCE6 away from sid.h and si_enums.h definesAlexandre Demers2025-04-071-167/+101
| | | | | | | | | | | This cleans up DCE6. I added some minor tweaks taken from CIK to exit early v2: minor fixes (Alex) Signed-off-by: Alexandre Demers <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: use proper defines, shifts and masks in DCE6 codeAlexandre Demers2025-04-071-20/+0
| | | | | | | | | | | By replacing VGA_VSTATUS_CNTL by VGA_RENDER_CONTROL__VGA_VSTATUS_CNTL_MASK, we also need to fix its usage in GMC6. Note: VGA_VSTATUS_CNTL's binary value was inverted in dce_6_0_sh_mask.h, so we need to invert its value where it was used. Signed-off-by: Alexandre Demers <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: finish wiring up sid.h in DCE6Alexandre Demers2025-03-111-6/+23
| | | | | | | | For coherence with DCE8 et DCE10, add or move some values under sid.h and remove duplicated from si_enums.h. Signed-off-by: Alexandre Demers <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: fix SI's GB_ADDR_CONFIG_GOLDEN values and wire up sid.h in GFX6Alexandre Demers2025-03-111-4/+0
| | | | | | | | | | | | By wiring up sid.h in GFX6, we end up with a few duplicated defines such as the golden registers. Let's clean this up. [TAHITI,VERDE, HAINAN]_GB_ADDR_CONFIG_GOLDEN were defined both in sid.h and under si_enums.h, with different values. Keep the values used under radeon and move them under gfx_v6_0.c where they are used (as it is done under cik) Signed-off-by: Alexandre Demers <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: prepare DCE6 uniformisation with DCE8 and DCE10Alexandre Demers2025-03-111-335/+1
| | | | | | | | | | | | | Let's begin the cleanup in sid.h to prevent warnings and errors when wiring sid.h into dce_v6_0.c. This is a bigger cleanup. Many defines found under sid.h have already been properly moved into the different "_d.h" and "_sh_mask.h", so they should have been already removed from sid.h and properly linked in where needed. Signed-off-by: Alexandre Demers <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: Clean up KFD VMID assignmentFelix Kuehling2020-07-021-2/+0
| | | | | | | | | | The KFD VMID assignment was hard-coded in a few places. Consolidate that in a single variable adev->vm_manager.first_kfd_vmid. The value is still assigned in gmc-ip-version-specific code. Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: SI support for VCE clock controlAlex Jivin2020-07-021-0/+32
| | | | | | | | | | Port functionality from the Radeon driver to support VCE clock control. Signed-off-by: Alex Jivin <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: SI support for UVD clock controlAlex Jivin2020-07-021-0/+1
| | | | | | | | | | Port functionality from the Radeon driver to support UVD clock control. Signed-off-by: Alex Jivin <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm amdgpu: SI UVD PACKET_TYPE0Sonny Jiang2020-07-011-3/+4
| | | | | | | | Fix packet_type0 definition in sid. Signed-off-by: Sonny Jiang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu/uvd3.x: fix register definition warningsAlex Deucher2020-07-011-19/+0
| | | | | | | | | drop the duplicate register macros from sid.h and use the standard ones in the oss register headers. Acked-by: Christian König <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: enable ABGR and XBGR formats (v2)Mauro Rossi2018-08-271-0/+20
| | | | | | | | | | | | Add support for DRM_FORMAT_{A,X}BGR8888 in amdgpu with amd dc disabled (v2) Crossbar registers are defined and used to swap red and blue channels, keeping the existing coding style in each of the dce modules. After setting crossbar bits in fb_swap, use bitwise OR for big endian where required in DCE6 and DCE8 which do not rely on REG_SET_FIELD() Signed-off-by: Mauro Rossi <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amdgpu: move misc si headers into amdgpuAlex Deucher2017-01-271-0/+2461
Move these to the amdgpu directory to match what we do for other asics. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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