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| author | Linus Torvalds <[email protected]> | 2021-05-14 17:52:47 +0000 |
|---|---|---|
| committer | Linus Torvalds <[email protected]> | 2021-05-14 17:52:47 +0000 |
| commit | bd3c9cdb21a2674dd0db70199df884828e37abd4 (patch) | |
| tree | d9ae2dd6a188097eb4c014df420d4f342aa8ac0e /tools/perf/scripts/python/intel-pt-events.py | |
| parent | Merge tag 'f2fs-5.13-rc1-fix' of git://git.kernel.org/pub/scm/linux/kernel/gi... (diff) | |
| parent | arm64: Fix race condition on PG_dcache_clean in __sync_icache_dcache() (diff) | |
| download | kernel-bd3c9cdb21a2674dd0db70199df884828e37abd4.tar.gz kernel-bd3c9cdb21a2674dd0db70199df884828e37abd4.zip | |
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 fixes from Catalin Marinas:
"Fixes and cpucaps.h automatic generation:
- Generate cpucaps.h at build time rather than carrying lots of
#defines. Merged at -rc1 to avoid some conflicts during the merge
window.
- Initialise RGSR_EL1.SEED in __cpu_setup() as it may be left as 0
out of reset and the IRG instruction would not function as expected
if only the architected pseudorandom number generator is
implemented.
- Fix potential race condition in __sync_icache_dcache() where the
PG_dcache_clean page flag is set before the actual cache
maintenance.
- Fix header include in BTI kselftests"
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: Fix race condition on PG_dcache_clean in __sync_icache_dcache()
arm64: tools: Add __ASM_CPUCAPS_H to the endif in cpucaps.h
arm64: mte: initialize RGSR_EL1.SEED in __cpu_setup
kselftest/arm64: Add missing stddef.h include to BTI tests
arm64: Generate cpucaps.h
Diffstat (limited to 'tools/perf/scripts/python/intel-pt-events.py')
0 files changed, 0 insertions, 0 deletions