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| author | Jason Gunthorpe <[email protected]> | 2025-07-14 04:50:26 +0000 |
|---|---|---|
| committer | Will Deacon <[email protected]> | 2025-07-14 10:18:04 +0000 |
| commit | 85cfaacc99377a63e47412eeef66eff77197acea (patch) | |
| tree | b4d1bef3a121add56e0fa870a11a00a656a79ec4 /drivers/iommu/intel/cache.c | |
| parent | iommu/vt-d: Split intel_iommu_enforce_cache_coherency() (diff) | |
| download | kernel-85cfaacc99377a63e47412eeef66eff77197acea.tar.gz kernel-85cfaacc99377a63e47412eeef66eff77197acea.zip | |
iommu/vt-d: Split paging_domain_compatible()
Make First/Second stage specific functions that follow the same pattern in
intel_iommu_domain_alloc_first/second_stage() for computing
EOPNOTSUPP. This makes the code easier to understand as if we couldn't
create a domain with the parameters for this IOMMU instance then we
certainly are not compatible with it.
Check superpage support directly against the per-stage cap bits and the
pgsize_bitmap.
Add a note that the force_snooping is read without locking. The locking
needs to cover the compatible check and the add of the device to the list.
Reviewed-by: Kevin Tian <[email protected]>
Signed-off-by: Jason Gunthorpe <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Lu Baolu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Will Deacon <[email protected]>
Diffstat (limited to 'drivers/iommu/intel/cache.c')
0 files changed, 0 insertions, 0 deletions
