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| author | Takeshi Kihara <[email protected]> | 2019-02-25 02:48:38 +0000 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2019-04-04 09:54:46 +0000 |
| commit | b953eaaeb58efc944f51cffd3f6838657958f0f8 (patch) | |
| tree | 2a5d1da5a5c6f0cdc1edc95d7e562da9a3774e41 /drivers/fpga/fpga-bridge.c | |
| parent | clk: renesas: r8a77980: Fix RPC-IF module clock's parent (diff) | |
| download | kernel-b953eaaeb58efc944f51cffd3f6838657958f0f8.tar.gz kernel-b953eaaeb58efc944f51cffd3f6838657958f0f8.zip | |
clk: renesas: rcar-gen3: Fix cpg_sd_clock_round_rate() return value
cpg_sd_clock_round_rate() may return an unsupported clock rate for the
requested clock rate. Therefore, when cpg_sd_clock_set_rate() sets the
clock rate acquired by cpg_sd_clock_round_rate(), an error may occur.
This is not conform the clk API design.
This patch fixes that by making sure cpg_sd_clock_calc_div() considers
only the division values defined in cpg_sd_div_table[].
With this fix, the cpg_sd_clock_round_rate() always return a support
clock rate.
Signed-off-by: Takeshi Kihara <[email protected]>
Fixes: 90c073e53909da85 ("clk: shmobile: r8a7795: Add SD divider support")
Signed-off-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Simon Horman <[email protected]>
Diffstat (limited to 'drivers/fpga/fpga-bridge.c')
0 files changed, 0 insertions, 0 deletions