Merge patch series "add FlexCAN support for S32G2/S32G3 SoCs"

Ciprian Costea <[email protected]> says:

S32G2 and S32G3 SoCs share the FlexCAN module with i.MX SoCs, with
some hardware integration particularities.

Main difference covered by this patch-set relates to interrupt
management. On S32G2/S32G3 SoC, there are separate interrupts for
state change, bus errors, MBs 0-7 and MBs 8-127 respectively.

Changes in V4:
- Updated IRQ description in bindings documentation
- Fixed some small issues with the proposed changes in the flexcan
  binding documentation

Changes in V3:
- Added Vincent Mailhol's Reviewed-by tag on the second patch
- Changed to 'platform_get_irq_byname' for second range of mailboxes
- Made several rephasing in bindings doc
- Removed Frank Li's Reviewed-by tags since changes were made
  afterwards.

Changes in V2:
- Separated 'FLEXCAN_QUIRK_NR_IRQ_3' quirk addition from S32G SoC
  Flexcan support.
- Provided more information in dt-bindings documentation with respect
  to FlexCAN module integration on S32G SoCs.
- Fixed and IRQ resource freeing management issue.

Link: https://patch.msgid.link/[email protected]
Signed-off-by: Marc Kleine-Budde <[email protected]>

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