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* treewide: Remove redundantMark Brown2025-07-071-2/+0
|\ | | | | | | | | | | | | | | | | | | | | | | Merge series from Sakari Ailus <[email protected]>: Late last year I posted a set to switch to __pm_runtime_mark_last_busy() and gradually get rid of explicit pm_runtime_mark_last_busy() calls in drivers, embedding them in the appropriate pm_runtime_*autosuspend*() calls. The overall feedback I got at the time was that this is an unnecessary intermediate step, and removing the pm_runtime_mark_last_busy() calls can be done after adding them to the relevant Runtime PM autosuspend related functions.
| * spi: Remove redundant pm_runtime_mark_last_busy() callsSakari Ailus2025-07-041-2/+0
| | | | | | | | | | | | | | | | | | | | | | pm_runtime_put_autosuspend(), pm_runtime_put_sync_autosuspend(), pm_runtime_autosuspend() and pm_request_autosuspend() now include a call to pm_runtime_mark_last_busy(). Remove the now-reduntant explicit call to pm_runtime_mark_last_busy(). Signed-off-by: Sakari Ailus <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Mark Brown <[email protected]>
* | spi: stm32: delete stray tabs in stm32h7_spi_data_idleness()Dan Carpenter2025-07-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | These lines were indented one tab more than they should be. Delete the stray tabs. Signed-off-by: Dan Carpenter <[email protected]> Acked-by: Alain Volmat <[email protected]> Reviewed-by: Clément Le Goffic <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Mark Brown <[email protected]>
* | spi: stm32: fix pointer-to-pointer variables usageAntonio Quartulli2025-06-301-10/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In stm32_spi_prepare_rx_dma_mdma_chaining() both rx_dma_desc and rx_mdma_desc are passed as pointer-to-pointer arguments. The goal is to pass back to the caller the value returned by dmaengine_prep_slave_sg(), when it is not NULL. However, these variables are wrongly handled as simple pointers during later assignments and checks. Fix this behaviour by introducing two pointer variables which can then be treated accordingly. Fixes: d17dd2f1d8a1 ("spi: stm32: use STM32 DMA with STM32 MDMA to enhance DDR use") Addresses-Coverity-ID: 1644715 ("Null pointer dereferences (REVERSE_INULL)") Signed-off-by: Antonio Quartulli <[email protected]> Reviewed-by: Clement LE GOFFIC <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Mark Brown <[email protected]>
* | spi: stm32: fix sram pool free in probe error pathClément Le Goffic2025-06-301-1/+3
| | | | | | | | | | | | | | | | | | | | | | Add a test to check whether the sram_pool is NULL before freeing it. Fixes: d17dd2f1d8a1 ("spi: stm32: use STM32 DMA with STM32 MDMA to enhance DDR use") Reported-by: Dan Carpenter <[email protected]> Acked-by: Alain Volmat <[email protected]> Signed-off-by: Clément Le Goffic <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Mark Brown <[email protected]>
* | spi: stm32: deprecate `st,spi-midi-ns` propertyClément Le Goffic2025-06-241-4/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | The `st,spi-midi-ns` property, which was used to set a nanosecond delay between transferred words, is now deprecated. This functionality is now supported by the SPI framework through the `spi_transfer` struct's `word_delay` variable. Therefore, the private `st,spi-midi-ns` property is no longer needed and has been deprecated in favor of the generic solution. Signed-off-by: Clément Le Goffic <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Mark Brown <[email protected]>
* | spi: stm32: use STM32 DMA with STM32 MDMA to enhance DDR useClément Le Goffic2025-06-241-23/+228
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The STM32 DMA doesn't have the ability to generate convenient burst transfer on the DDR, ensuring the best load of the AXI & DDR. To avoid this bad load of the AXI & DDR, STM32 MDMA can be used to transfer data to the DDR, being triggered by STM32 DMA channel transfer completion. An SRAM buffer is used between DMA and MDMA. So the MDMA always does MEM_TO_MEM transfers (from/to SRAM to/from DDR), and the DMA uses SRAM instead of DDR with DEV_TO_MEM transfers. SPI RX DMA (DEV_TO_MEM) becomes: SPI RX FIFO ==DMA==> SRAM ==MDMA==> DDR In RX (DEV_TO_MEM), EOT interrupt is used to pause the DMA channel (which will raise a transfer complete) to trigger the MDMA to flush the SRAM (when transfer length is not aligned on SRAM period). TX remains on the former implementation. Signed-off-by: Clément Le Goffic <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Mark Brown <[email protected]>
* | spi: stm32: Check for cfg availability in stm32_spi_probeClément Le Goffic2025-06-241-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The stm32_spi_probe function now includes a check to ensure that the pointer returned by of_device_get_match_data is not NULL before accessing its members. This resolves a warning where a potential NULL pointer dereference could occur when accessing cfg->has_device_mode. Before accessing the 'has_device_mode' member, we verify that 'cfg' is not NULL. If 'cfg' is NULL, an error message is logged. This change ensures that the driver does not attempt to access configuration data if it is not available, thus preventing a potential system crash due to a NULL pointer dereference. Signed-off-by: Clément Le Goffic <[email protected]> Reported-by: kernel test robot <[email protected]> Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/ Fixes: fee681646fc8 ("spi: stm32: disable device mode with st,stm32f4-spi compatible") Link: https://patch.msgid.link/[email protected] Signed-off-by: Mark Brown <[email protected]>
* | spi: stm32: Add SPI_READY mode to spi controllerClément Le Goffic2025-06-241-4/+24
|/ | | | | | | | | | | The spi ready functionality is supported by our peripheral in host and target modes on STM32MP2x SoCs. Update our spi controller driver to allow devices to use this functionality. Signed-off-by: Clément Le Goffic <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: fix missing device mode capability in stm32mp25Alain Volmat2024-10-101-0/+1
| | | | | | | | | | | | The STM32MP25 SOC has capability to behave in device mode however missing .has_device_mode within its stm32mp25_spi_cfg structure leads to not being able to enable the device mode. Fixes: f6cd66231aa5 ("spi: stm32: add st,stm32mp25-spi compatible supporting STM32MP25 soc") Cc: [email protected] Signed-off-by: Alain Volmat <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: Switch back to struct platform_driver::remove()Uwe Kleine-König2024-09-291-1/+1
| | | | | | | | | | | | | | | | | | | After commit 0edb555a65d1 ("platform: Make platform_driver::remove() return void") .remove() is (again) the right callback to implement for platform drivers. Convert all platform drivers below drivers/spi to use .remove(), with the eventual goal to drop struct platform_driver::remove_new(). As .remove() and .remove_new() have the same prototypes, conversion is done by just changing the structure member name in the driver initializer. The change for the spi-npcm-fiu stands out in the diffstat because the inconsistent formatting style of the platform_driver initializer is fixed to match the other struct initializer in the file. Signed-off-by: Uwe Kleine-König <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: Don't warn about spurious interruptsUwe Kleine-König2024-05-291-1/+1
| | | | | | | | | | | | | The dev_warn to notify about a spurious interrupt was introduced with the reasoning that these are unexpected. However spurious interrupts tend to trigger continously and the error message on the serial console prevents that the core's detection of spurious interrupts kicks in (which disables the irq) and just floods the console. Fixes: c64e7efe46b7 ("spi: stm32: make spurious and overrun interrupts visible") Signed-off-by: Uwe Kleine-König <[email protected]> Link: https://msgid.link/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: Revert change that enabled controller before asserting CSUwe Kleine-König2024-05-231-2/+12
| | | | | | | | | | | | | | | On stm32mp157 enabling the controller before asserting CS makes the hardware trigger spurious interrupts in a tight loop and the transfers fail. Revert the commit that swapped the order of enable and CS. This reintroduces the problem that swapping was supposed to fix, which however is less grave. Reported-by: Leonard Göhrs <[email protected]> Link: https://lore.kernel.org/all/[email protected]/ Fixes: 52b62e7a5d4f ("spi: stm32: enable controller before asserting CS") Signed-off-by: Uwe Kleine-König <[email protected]> Link: https://msgid.link/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: enable controller before asserting CSBen Wolsieffer2024-05-031-12/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the STM32F4/7, the MOSI and CLK pins float while the controller is disabled. CS is a regular GPIO, and therefore always driven. Currently, the controller is enabled in the transfer_one() callback, which runs after CS is asserted. Therefore, there is a period where the SPI pins are floating while CS is asserted, making it possible for stray signals to disrupt communications. An analogous problem occurs at the end of the transfer when the controller is disabled before CS is released. This problem can be reliably observed by enabling the pull-up (if CPOL=0) or pull-down (if CPOL=1) on the clock pin. This will cause two extra unintended clock edges per transfer, when the controller is enabled and disabled. Note that this bug is likely not present on the STM32H7, because this driver sets the AFCNTR bit (not supported on F4/F7), which keeps the SPI pins driven even while the controller is disabled. Enabling/disabling the controller as part of runtime PM was suggested as an alternative approach, but this breaks the driver on the STM32MP1 (see [1]). The following quote from the manual may explain this: > To restart the internal state machine properly, SPI is strongly > suggested to be disabled and re-enabled before next transaction starts > despite its setting is not changed. This patch has been tested on an STM32F746 with a MAX14830 UART expander. [1] https://lore.kernel.org/lkml/ZXzRi_h2AMqEhMVw@dell-precision-5540/T/ Signed-off-by: Ben Wolsieffer <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: move splitting transfers to optimize_messageDavid Lechner2024-02-261-12/+16
| | | | | | | | | | | | Since splitting transfers was moved to spi_optimize_message() in the core SPI code, we now need to use the optimize_message callback in the STM32 SPI driver to ensure that the operation is only performed once when spi_optimize_message() is used by peripheral drivers explicitly. Signed-off-by: David Lechner <[email protected]> Link: https://msgid.link/r/20240219-mainline-spi-precook-message-v2-3-4a762c6701b9@baylibre.com Reviewed-by: Jonathan Cameron <[email protected]> Signed-off-by: Mark Brown <[email protected]>
* spi: drop gpf arg from __spi_split_transfer_maxsize()David Lechner2024-02-071-3/+1
| | | | | | | | | | | | | | | | The __spi_split_transfer_maxsize() function has a gpf argument to allow callers to specify the type of memory allocation that needs to be used. However, this function only allocates struct spi_transfer and is not intended to be used from atomic contexts so this type should always be GFP_KERNEL, so we can just drop the argument. Some callers of these functions also passed GFP_DMA, but since only struct spi_transfer is allocated and not any tx/rx buffers, this is not actually necessary and is removed in this commit. Signed-off-by: David Lechner <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: add st,stm32mp25-spi compatible supporting STM32MP25 socValentin Caron2023-12-211-12/+120
| | | | | | | | | | | | Add support for the STM32MP25: - Burst should not be enabled with the new DMA used on STM32MP25. - STM32MP25 SPI8 has a limited feature set, it can only send words of 8 or 16 bits and with a maximum words number of 1024. Signed-off-by: Valentin Caron <[email protected]> Signed-off-by: Alain Volmat <[email protected]> Link: https://msgid.link/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: use dma_get_slave_caps prior to configuring dma channelAlain Volmat2023-12-211-2/+11
| | | | | | | | | First check the dma channel capabilities (max burst) before configuring the dma channel. Signed-off-by: Alain Volmat <[email protected]> Link: https://msgid.link/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: switch to use modern nameYang Yingliang2023-12-111-20/+20
| | | | | | | | | | Change legacy name master/slave to modern name host/target. No functional changed. Signed-off-by: Yang Yingliang <[email protected]> Link: https://msgid.link/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: add STM32F7 supportBen Wolsieffer2023-11-131-0/+149
| | | | | | | | | | | The STM32F7 SPI peripheral is similar to the STM32F4, except it allows arbitrary word lengths between 4 and 16 bits, and has a small 32-bit FIFO that allows two 8-bit or smaller words to be transferred with a single 16-bit read/write. Signed-off-by: Ben Wolsieffer <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: use callbacks for read_rx and write_txBen Wolsieffer2023-11-131-4/+12
| | | | | | | | | The STM32F7 will require different read and write routines, so make these functions into configurable callbacks. Signed-off-by: Ben Wolsieffer <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: rename stm32f4_* to stm32fx_*Ben Wolsieffer2023-11-131-141/+141
| | | | | | | | | | | | The STM32F4 and STM32F7 SPI peripherals are very similar, therefore most of the driver can be shared between the two. In preparation for adding support for the F7, change all functions and defines to use a generic stm32fx prefix, except for code and registers that differ between the two devices. Signed-off-by: Ben Wolsieffer <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: Merge up fixMark Brown2023-10-301-0/+8
|\ | | | | | | One small fix that didn't seem worth sending before the merge window.
| * spi: stm32: add a delay before SPI disableValentin Caron2023-09-111-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As explained in errata sheet, in section "2.14.5 Truncation of SPI output signals after EOT event": On STM32MP1x, EOT interrupt can be thrown before the true end of communication. So we add a delay of a half period to wait the real end of the transmission. Link: https://www.st.com/resource/en/errata_sheet/es0539-stm32mp131x3x5x-device-errata-stmicroelectronics.pdf Signed-off-by: Valentin Caron <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* | spi: stm32: Explicitly include correct DT includesRob Herring2023-10-171-1/+2
|/ | | | | | | | | | | | | | | | The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it was merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Acked-by: Alain Volmat <[email protected]> Signed-off-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* Merge tag 'spi-v6.6' of ↵Linus Torvalds2023-08-291-6/+12
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi updates from Mark Brown: "There's been quite a lot of generic activity here, but more administrative than featuers. We also have a bunch of new drivers, including one that's part of a MFD so we pulled in the core parts of that: - Lots of work from both Yang Yingliang and Andy Shevchenko on moving to host/device/controller based terminology for devices. - QuadSPI SPI support for Allwinner sun6i. - New device support Cirrus Logic CS43L43, Longsoon, Qualcomm GENI QuPv3 and StarFive JH7110 QSPI" * tag 'spi-v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (151 commits) spi: at91-usart: Use PTR_ERR_OR_ZERO() to simplify code spi: spi-sn-f-ospi: switch to use modern name spi: sifive: switch to use modern name spi: sh: switch to use modern name spi: sh-sci: switch to use modern name spi: sh-msiof: switch to use modern name spi: sh-hspi: switch to use modern name spi: sc18is602: switch to use modern name spi: s3c64xx: switch to use modern name spi: rzv2m-csi: switch to use devm_spi_alloc_host() spi: rspi: switch to use spi_alloc_host() spi: rockchip: switch to use modern name spi: rockchip-sfc: switch to use modern name spi: realtek-rtl: switch to use devm_spi_alloc_host() spi: rb4xx: switch to use modern name spi: qup: switch to use modern name spi: spi-qcom-qspi: switch to use modern name spi: pxa2xx: switch to use modern name spi: ppc4xx: switch to use modern name spi: spl022: switch to use modern name ...
| * spi: stm32: Remove redundant dev_err_probe()Ruan Jinjie2023-07-271-2/+1
| | | | | | | | | | | | | | | | | | | | There is no need to call the dev_err_probe() function directly to print a custom message when handling an error from platform_get_irq() function as it is going to display an appropriate error message in case of a failure. Signed-off-by: Ruan Jinjie <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
| * spi: Header and core clean up and refactoringMark Brown2023-07-121-1/+1
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Andy Shevchenko <[email protected]>: Various cleanups and refactorings of the SPI header and core parts united in a single series. It also touches drivers under SPI subsystem folder on the pure renaming purposes of some constants. No functional change intended.
| | * spi: Get rid of old SPI_MASTER_MUST_TX & SPI_MASTER_MUST_RXAndy Shevchenko2023-07-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the users from SPI_MASTER_MUST_TX and/or SPI_MASTER_MUST_RX to SPI_CONTROLLER_MUST_TX and/or SPI_CONTROLLER_MUST_RX respectively and kill the not used anymore definitions. Signed-off-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
| * | spi: stm32: disable device mode with st,stm32f4-spi compatibleValentin Caron2023-07-091-3/+10
| |/ | | | | | | | | | | | | | | | | STM32 SPI driver is not capable to handle device mode with stm32f4 soc. Stop probing if this case happens. Signed-off-by: Valentin Caron <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* / spi: stm32: fix accidential revert to byte-sized transfer splittingLeonard Göhrs2023-08-211-3/+3
|/ | | | | | | | | | | | | | | | | | Commit 6f486556abe35 ("spi: stm32: renaming of spi_master into spi_controller") included an accidential reverted of a change added in commit 1e4929112507f ("spi: stm32: split large transfers based on word size instead of bytes"). This breaks large SPI transfers with word sizes > 8 bits, which are e.g. common when driving MIPI DBI displays. Fix this by using `spi_split_transfers_maxwords()` instead of `spi_split_transfers_maxsize()`. Fixes: 6f486556abe35 ("spi: stm32: renaming of spi_master into spi_controller") Signed-off-by: Leonard Göhrs <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: introduction of stm32h7 SPI device mode supportValentin Caron2023-06-151-34/+78
| | | | | | | | | | | Add support for stm32h7 to use SPI controller in device role. In such case, the spi instance should have the spi-slave property defined. Signed-off-by: Alain Volmat <[email protected]> Signed-off-by: Valentin Caron <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: use dmaengine_terminate_{a}sync instead of _allAlain Volmat2023-06-151-5/+5
| | | | | | | | | | Avoid usage of deprecated dmaengine_terminate_all and use dmaengine_terminate_sync and dmaengine_terminate_async instead. Signed-off-by: Alain Volmat <[email protected]> Signed-off-by: Valentin Caron <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: renaming of spi_master into spi_controllerAlain Volmat2023-06-151-77/+77
| | | | | | | | | | | | | Preparing introduction of SPI device, rename the spi_master structure into spi_controller. This doesn't have any functional impact since spi_master was already a macro for spi_controller. Referring now to ctrl instead of master since the spi_controller structure might not be used as a master controller only. Signed-off-by: Alain Volmat <[email protected]> Signed-off-by: Valentin Caron <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: Use devm_platform_get_and_ioremap_resource()Yang Li2023-04-041-2/+1
| | | | | | | | | | | | According to commit 890cc39a8799 ("drivers: provide devm_platform_get_and_ioremap_resource()"), convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yang Li <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: split large transfers based on word size instead of bytesLeonard Göhrs2023-03-161-3/+3
| | | | | | | | | | | | | | | | | | | | | | The TSIZE register in CR2, to which the number of words to transfer is written, is only 16 Bit. This limits transfers to 65535 SPI _words_ at a time. The existing code uses spi_split_transfers_maxsize to limit transfers to 65535 _bytes_ at a time. This breaks large transfers with bits_per_word > 8, as they are split inside of a word boundary by the odd size limit. Split transfers based on the number of words instead. This has the added benefit of not artificially limiting the maximum length of bpw > 8 transfers to half or a quarter of the actual limit. The combination of very large transfers and bits_per_word = 16 is triggered e.g. by MIPI DBI displays when updating large parts of the screen. Signed-off-by: Leonard Göhrs <[email protected]> Acked-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: Convert to platform remove callback returning voidUwe Kleine-König2023-03-061-4/+2
| | | | | | | | | | | | | | | | | The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: fix stm32_spi_prepare_mbr() that halves spi clk for every runSean Nyekjaer2022-11-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | When this driver is used with a driver that uses preallocated spi_transfer structs. The speed_hz is halved by every run. This results in: spi_stm32 44004000.spi: SPI transfer setup failed ads7846 spi0.0: SPI transfer failed: -22 Example when running with DIV_ROUND_UP(): - First run; speed_hz = 1000000, spi->clk_rate 125000000 div 125 -> mbrdiv = 7, cur_speed = 976562 - Second run; speed_hz = 976562 div 128,00007 (roundup to 129) -> mbrdiv = 8, cur_speed = 488281 - Third run; speed_hz = 488281 div 256,000131072067109 (roundup to 257) and then -EINVAL is returned. Use DIV_ROUND_CLOSEST to allow to round down and allow us to keep the set speed. Signed-off-by: Sean Nyekjaer <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: Print summary 'callbacks suppressed' messageMarek Vasut2022-10-241-0/+1
| | | | | | | | | | | | | The original fix "spi: stm32: Rate-limit the 'Communication suspended' message" still leads to "stm32h7_spi_irq_thread: 1696 callbacks suppressed" spew in the kernel log. Since this 'Communication suspended' message is a debug print, add RATELIMIT_MSG_ON_RELEASE flag to inhibit the "callbacks suspended" part during normal operation and only print summary at the end. Fixes: ea8be08cc9358 ("spi: stm32: Rate-limit the 'Communication suspended' message") Signed-off-by: Marek Vasut <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: using pm_runtime_resume_and_get instead of pm_runtime_get_syncMinghao Chi2022-04-251-2/+1
| | | | | | | | | | | Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by: Zeal Robot <[email protected]> Signed-off-by: Minghao Chi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: ignore Rx queue not empty in stm32f4 Tx only modeAhmad Fatoum2022-02-221-1/+1
| | | | | | | | | | | | | | | | STM32F4_SPI_SR_RXNE and STM32F4_SPI_SR_OVR are distinct bits in the same status register. ~STM32F4_SPI_SR_OVR | STM32F4_SPI_SR_RXNE is thus equal to ~STM32F4_SPI_SR_OVR. The original intention was likely for transmission-only transfers to ignore interrupts both for when the Rx queue has bytes (RXNE) as well as when these bytes haven't been read in time (OVR). Fix the typo by adding the missing parenthesis. Signed-off-by: Ahmad Fatoum <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: make SPI_MASTER_MUST_TX flags only specific to STM32F4Alain Volmat2022-01-191-1/+4
| | | | | | | | | | | | | | | | | Commit 61367d0b8f5e ("spi: stm32: Add 'SPI_SIMPLEX_RX', 'SPI_3WIRE_RX' support for stm32f4") allowed to properly communicate with the st-gyro-spi even when there is no tx_buf provided by setting the flag SPI_MASTER_MUST_TX and thus forcing a dummy TX buffer to work in Full Duplex. This behavior should kept only for the STM32F4 and not for other compatible since the STM32H7 do support SIMPLEX_RX and SIMPLEX_TX. Add the flags variable within the struct stm32_spi_cfg so that flags used at master registration time are compatible specific. Fixes: 61367d0b8f5e ("spi: stm32: Add 'SPI_SIMPLEX_RX', 'SPI_3WIRE_RX' support for stm32f4") Signed-off-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: remove inexistant variables in struct stm32_spi_cfg commentAlain Volmat2022-01-191-2/+0
| | | | | | | | | | Variables 'can_dma' and 'has_startbit' are described within the struct stm32_spi_cfg comment but have never existed in this structure so remove them. Signed-off-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: fix excluded_middle.cocci warningskernel test robot2021-08-201-2/+1
| | | | | | | | | | | | | | | | drivers/spi/spi-stm32.c:915:23-25: WARNING !A || A && B is equivalent to !A || B Condition !A || A && B is equivalent to !A || B. Generated by: scripts/coccinelle/misc/excluded_middle.cocci Fixes: 7ceb0b8a3ced ("spi: stm32: finalize message either on dma callback or EOT") CC: Alain Volmat <[email protected]> Reported-by: kernel test robot <[email protected]> Signed-off-by: kernel test robot <[email protected]> Reviewed-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/20210713191004.GA14729@5eb5c2cbef84 Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: finalize message either on dma callback or EOTAlain Volmat2021-07-111-37/+20
| | | | | | | | | | | | | Depending on the usage, it is necessary to perform the finalize message operation either upon receiving the EOT interruption, eiher upon receiving the DMA callback. Indeed, when relying on DMA, even if the SPI EOT IT has been received, it is necessary to wait for the end of the DMA RX transaction before accessing to the data. Signed-off-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32h7: don't wait for EOT and flush fifo on disableAlain Volmat2021-07-111-22/+2
| | | | | | | | | | | | In nominal cases, disable is called as part of the unprepare_message, after receiving a EOT and after receiving all data so it doesn't make sense to check for EOT and empty the FIFO. Moreover, at the end of the disable, the SPI is disable (SPE) leading to clear of all internal FIFO, leaving the IP in a known status. Signed-off-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32h7: rework rx fifo read functionAmelie Delaunay2021-07-111-17/+13
| | | | | | | | | | Remove flush parameter and check RXWNE or RXPLVL when end of transfer flag is set. Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: Revert "properly handle 0 byte transfer"Alain Volmat2021-07-111-4/+0
| | | | | | | | | | | 0 byte transfer handling is now done within the core in code added by commit b306320322c9 ("spi: Skip zero-length transfers in spi_transfer_one_message()") This reverts commit 2269f5a8b1a7 ("spi: stm32: properly handle 0 byte transfer") Signed-off-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: enable pm_runtime autosuspendAlain Volmat2021-07-111-0/+11
| | | | | | | | | This commit enables the pm_runtime autosuspend and sets a 1ms autosuspend delay. Signed-off-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
* spi: stm32: fixes pm_runtime calls in probe/removeAlain Volmat2021-07-071-1/+8
| | | | | | | | | | | | | | | | | | Add pm_runtime calls in probe/probe error path and remove in order to be consistent in all places in ordering and ensure that pm_runtime is disabled prior to resources used by the SPI controller. This patch also fixes the 2 following warnings on driver remove: WARNING: CPU: 0 PID: 743 at drivers/clk/clk.c:594 clk_core_disable_lock+0x18/0x24 WARNING: CPU: 0 PID: 743 at drivers/clk/clk.c:476 clk_unprepare+0x24/0x2c Fixes: 038ac869c9d2 ("spi: stm32: add runtime PM support") Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
generated by cgit (git 2.51.2) at 2025-12-03 17:03:08 +0000