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* mm: remove callers of pfn_t functionalityAlistair Popple2025-07-101-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | All PFN_* pfn_t flags have been removed. Therefore there is no longer a need for the pfn_t type and all uses can be replaced with normal pfns. Link: https://lkml.kernel.org/r/bbedfa576c9822f8032494efbe43544628698b1f.1750323463.git-series.apopple@nvidia.com Signed-off-by: Alistair Popple <[email protected]> Reviewed-by: Christoph Hellwig <[email protected]> Reviewed-by: Jason Gunthorpe <[email protected]> Acked-by: David Hildenbrand <[email protected]> Cc: Balbir Singh <[email protected]> Cc: Björn Töpel <[email protected]> Cc: Björn Töpel <[email protected]> Cc: Chunyan Zhang <[email protected]> Cc: Dan Williams <[email protected]> Cc: Deepak Gupta <[email protected]> Cc: Gerald Schaefer <[email protected]> Cc: Inki Dae <[email protected]> Cc: John Groves <[email protected]> Cc: John Hubbard <[email protected]> Cc: Lorenzo Stoakes <[email protected]> Cc: Matthew Wilcox (Oracle) <[email protected]> Cc: Will Deacon <[email protected]> Signed-off-by: Andrew Morton <[email protected]>
* Merge tag 'coresight-next-v6.16' of ↵Greg Kroah-Hartman2025-05-2230-205/+556
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next Suzuki writes: coresight: updates for Linux v6.16 CoreSight self-hosted trace driver subsystem updates for Linux v6.16 includes: - Clear CLAIM tags on device probe if self-hosted tags are set. - Support for perf AUX pause/resume for CoreSight ETM PMU driver, with trace collection at pause. - Miscellaneous fixes for the subsystem Signed-off-by: Suzuki K Poulose <[email protected]> * tag 'coresight-next-v6.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/coresight/linux: (27 commits) coresight: prevent deactivate active config while enabling the config coresight: holding cscfg_csdev_lock while removing cscfg from csdev coresight/etm4: fix missing disable active config coresight: etm4x: Fix timestamp bit field handling coresight: tmc: fix failure to disable/enable ETF after reading Documentation: coresight: Document AUX pause and resume coresight: perf: Update buffer on AUX pause coresight: tmc: Re-enable sink after buffer update coresight: perf: Support AUX trace pause and resume coresight: etm4x: Hook pause and resume callbacks coresight: Introduce pause and resume APIs for source coresight: etm4x: Extract the trace unit controlling coresight: cti: Replace inclusion by struct fwnode_handle forward declaration coresight: Disable MMIO logging for coresight stm driver coresight: replicator: Fix panic for clearing claim tag coresight: Add a KUnit test for coresight_find_default_sink() coresight: Remove extern from function declarations coresight: Remove inlines from static function definitions coresight: Clear self hosted claim tag on probe coresight: etm3x: Convert raw base pointer to struct coresight access ...
| * coresight: prevent deactivate active config while enabling the configYeoreum Yun2025-05-202-16/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While enable active config via cscfg_csdev_enable_active_config(), active config could be deactivated via configfs' sysfs interface. This could make UAF issue in below scenario: CPU0 CPU1 (sysfs enable) load module cscfg_load_config_sets() activate config. // sysfs (sys_active_cnt == 1) ... cscfg_csdev_enable_active_config() lock(csdev->cscfg_csdev_lock) // here load config activate by CPU1 unlock(csdev->cscfg_csdev_lock) deactivate config // sysfs (sys_activec_cnt == 0) cscfg_unload_config_sets() unload module // access to config_desc which freed // while unloading module. cscfg_csdev_enable_config To address this, use cscfg_config_desc's active_cnt as a reference count which will be holded when - activate the config. - enable the activated config. and put the module reference when config_active_cnt == 0. Fixes: f8cce2ff3c04 ("coresight: syscfg: Add API to activate and enable configurations") Suggested-by: Suzuki K Poulose <[email protected]> Signed-off-by: Yeoreum Yun <[email protected]> Reviewed-by: Leo Yan <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: holding cscfg_csdev_lock while removing cscfg from csdevYeoreum Yun2025-05-201-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There'll be possible race scenario for coresight config: CPU0 CPU1 (perf enable) load module cscfg_load_config_sets() activate config. // sysfs (sys_active_cnt == 1) ... cscfg_csdev_enable_active_config() lock(csdev->cscfg_csdev_lock) deactivate config // sysfs (sys_activec_cnt == 0) cscfg_unload_config_sets() <iterating config_csdev_list> cscfg_remove_owned_csdev_configs() // here load config activate by CPU1 unlock(csdev->cscfg_csdev_lock) iterating config_csdev_list could be raced with config_csdev_list's entry delete. To resolve this race , hold csdev->cscfg_csdev_lock() while cscfg_remove_owned_csdev_configs() Fixes: 02bd588e12df ("coresight: configuration: Update API to permit dynamic load/unload") Signed-off-by: Yeoreum Yun <[email protected]> Reviewed-by: Leo Yan <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight/etm4: fix missing disable active configYeoreum Yun2025-05-201-0/+3
| | | | | | | | | | | | | | | | | | | | | | When etm4 device is disabled via sysfs, it should disable its active count. Fixes: 7ebd0ec6cf94 ("coresight: configfs: Allow configfs to activate configuration") Signed-off-by: Yeoreum Yun <[email protected]> Reviewed-by: Leo Yan <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: etm4x: Fix timestamp bit field handlingLeo Yan2025-05-202-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Timestamps in the trace data appear as all zeros on recent kernels, although the feature works correctly on old kernels (e.g., v6.12). Since commit c382ee674c8b ("arm64/sysreg/tools: Move TRFCR definitions to sysreg"), the TRFCR_ELx_TS_{VIRTUAL|GUEST_PHYSICAL|PHYSICAL} macros were updated to remove the bit shift. As a result, the driver no longer shifts bits when operates the timestamp field. Fix this by using the FIELD_PREP() and FIELD_GET() helpers. Reported-by: Tamas Zsoldos <[email protected]> Fixes: c382ee674c8b ("arm64/sysreg/tools: Move TRFCR definitions to sysreg") Signed-off-by: Leo Yan <[email protected]> Reviewed-by: James Clark <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: tmc: fix failure to disable/enable ETF after readingMao Jinlong2025-05-141-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | ETF may fail to re-enable after reading, and driver->reading will not be set to false, this will cause failure to enable/disable to ETF. This change set driver->reading to false even if re-enabling fail. Fixes: 669c4614236a ("coresight: tmc: Don't enable TMC when it's not ready.") Co-developed-by: Yuanfang Zhang <[email protected]> Signed-off-by: Yuanfang Zhang <[email protected]> Signed-off-by: Mao Jinlong <[email protected]> [ Added a comment to explain why we ignore the error ] Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: perf: Update buffer on AUX pauseLeo Yan2025-05-141-2/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to sinks like ETR and ETB don't support interrupt handling, the hardware trace data might be lost for continuous running tasks. This commit takes advantage of the AUX pause for updating trace buffer to mitigate the trace data losing issue. The per CPU sink has its own interrupt handling. Thus, there will be a race condition between the updating buffer in NMI and sink's interrupt handler. To avoid the race condition, this commit disallows updating buffer on AUX pause for the per CPU sink. Currently, this is only applied for TRBE. Signed-off-by: Leo Yan <[email protected]> Reviewed-by: James Clark <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: tmc: Re-enable sink after buffer updateLeo Yan2025-05-142-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The buffer update callbacks disable the sink before syncing data but misses to re-enable it afterward. This is fine in the general flow, because the sink will be re-enabled the next time the PMU event is activated. However, during AUX pause and resume, if the sink is disabled in the buffer update callback, there is no chance to re-enable it when AUX resumes. To address this, the callbacks now check the event state 'event->hw.state'. If the event is an active state (0), the sink is re-enabled. For the TMC ETR driver, buffer updates are not fully protected by the driver's spinlock. In this case, the sink is not re-enabled if its reference counter is 0, in order to avoid race conditions where the sink may have been completely disabled. Signed-off-by: Leo Yan <[email protected]> Reviewed-by: Mike Leach <[email protected]> Reviewed-by: James Clark <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: perf: Support AUX trace pause and resumeLeo Yan2025-05-141-1/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit supports AUX trace pause and resume in a perf session for Arm CoreSight. First, we need to decide which flag can indicate the CoreSight PMU event has started. The 'event->hw.state' cannot be used for this purpose because its initial value and the value after hardware trace enabling are both 0. On the other hand, the context value 'ctxt->event_data' stores the ETM private info. This pointer is valid only when the PMU event has been enabled. It is safe to permit AUX trace pause and resume operations only when it is not a NULL pointer. To achieve fine-grained control of the pause and resume, only the tracer is disabled and enabled. This avoids the unnecessary complexity and latency caused by manipulating the entire link path. Signed-off-by: Leo Yan <[email protected]> Reviewed-by: Mike Leach <[email protected]> Reviewed-by: James Clark <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: etm4x: Hook pause and resume callbacksLeo Yan2025-05-142-1/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add callbacks for pausing and resuming the tracer. A "paused" flag in the driver data indicates whether the tracer is paused. If the flag is set, the driver will skip starting the hardware trace. The flag is always set to false for the sysfs mode, meaning the tracer will never be paused in the case. Signed-off-by: Leo Yan <[email protected]> Reviewed-by: Mike Leach <[email protected]> Reviewed-by: James Clark <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: Introduce pause and resume APIs for sourceLeo Yan2025-05-142-0/+24
| | | | | | | | | | | | | | | | | | | | | | Introduce APIs for pausing and resuming trace source and export as GPL symbols. Signed-off-by: Leo Yan <[email protected]> Reviewed-by: Mike Leach <[email protected]> Reviewed-by: James Clark <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: etm4x: Extract the trace unit controllingLeo Yan2025-05-141-41/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The trace unit is controlled in the ETM hardware enabling and disabling. The sequential changes for support AUX pause and resume will reuse the same operations. Extract the operations in the etm4_{enable|disable}_trace_unit() functions. A minor improvement in etm4_enable_trace_unit() is for returning the timeout error to callers. Signed-off-by: Leo Yan <[email protected]> Reviewed-by: Mike Leach <[email protected]> Reviewed-by: James Clark <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: cti: Replace inclusion by struct fwnode_handle forward declarationAndy Shevchenko2025-05-081-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The fwnode.h is not supposed to be used by the drivers as it has the definitions for the core parts for different device property provider implementations. Drop it. Since the code wants to use the pointer to the struct fwnode_handle the forward declaration is provided. Signed-off-by: Andy Shevchenko <[email protected]> Reviewed-by: James Clark <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: Disable MMIO logging for coresight stm driverMao Jinlong2025-05-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With MMIO logging enabled, the MMIO access are traced and could be sent to an STM device. Thus, an STM driver MMIO access could create circular call chain with MMIO logging. Disable it for STM driver. [] stm_source_write[stm_core]+0xc4 [] stm_ftrace_write[stm_ftrace]+0x40 [] trace_event_buffer_commit+0x238 [] trace_event_raw_event_rwmmio_rw_template+0x8c [] log_post_write_mmio+0xb4 [] writel_relaxed[coresight_stm]+0x80 [] stm_generic_packet[coresight_stm]+0x1a8 [] stm_data_write[stm_core]+0x78 [] stm_source_write[stm_core]+0x7c [] stm_ftrace_write[stm_ftrace]+0x40 [] trace_event_buffer_commit+0x238 [] trace_event_raw_event_rwmmio_read+0x84 [] log_read_mmio+0xac [] readl_relaxed[coresight_tmc]+0x50 Signed-off-by: Mao Jinlong <[email protected]> Reviewed-by: Leo Yan <[email protected]> Reviewed-by: Anshuman Khandual <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: replicator: Fix panic for clearing claim tagLeo Yan2025-05-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On platforms with a static replicator, a kernel panic occurs during boot: [ 4.999406] replicator_probe+0x1f8/0x360 [ 5.003455] replicator_platform_probe+0x64/0xd8 [ 5.008115] platform_probe+0x70/0xf0 [ 5.011812] really_probe+0xc4/0x2a8 [ 5.015417] __driver_probe_device+0x80/0x140 [ 5.019813] driver_probe_device+0xe4/0x170 [ 5.024032] __driver_attach+0x9c/0x1b0 [ 5.027900] bus_for_each_dev+0x7c/0xe8 [ 5.031769] driver_attach+0x2c/0x40 [ 5.035373] bus_add_driver+0xec/0x218 [ 5.039154] driver_register+0x68/0x138 [ 5.043023] __platform_driver_register+0x2c/0x40 [ 5.047771] coresight_init_driver+0x4c/0xe0 [ 5.052079] replicator_init+0x30/0x48 [ 5.055865] do_one_initcall+0x4c/0x280 [ 5.059736] kernel_init_freeable+0x1ec/0x3c8 [ 5.064134] kernel_init+0x28/0x1f0 [ 5.067655] ret_from_fork+0x10/0x20 A static replicator doesn't have registers, so accessing the claim register results in a NULL pointer deference. Fixes the issue by accessing the claim registers only after the I/O resource has been successfully mapped. Fixes: 7cd6368657f1 ("coresight: Clear self hosted claim tag on probe") Signed-off-by: Leo Yan <[email protected]> Reviewed-by: James Clark <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: Add a KUnit test for coresight_find_default_sink()James Clark2025-04-304-0/+85
| | | | | | | | | | | | | | | | | | | | | | | | Add a test to confirm that default sink selection skips over an ETF and returns an ETR even if it's further away. This also makes it easier to add new unit tests in the future. Reviewed-by: Leo Yan <[email protected]> Signed-off-by: James Clark <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: Remove extern from function declarationsJames Clark2025-04-301-8/+6
| | | | | | | | | | | | | | | | | | | | | | Function declarations are extern by default so remove the extra noise and inconsistency. Reviewed-by: Leo Yan <[email protected]> Reviewed-by: Yeoreum Yun <[email protected]> Signed-off-by: James Clark <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: Remove inlines from static function definitionsJames Clark2025-04-3012-60/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | These are all static and in one compilation unit so the inline has no effect on the binary. Except if FTRACE is enabled, then some functions which were already not inlined now get the nops added which allows them to be traced. Reviewed-by: Leo Yan <[email protected]> Reviewed-by: Yeoreum Yun <[email protected]> Signed-off-by: James Clark <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: Clear self hosted claim tag on probeJames Clark2025-04-308-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | This can be left behind from a crashed kernel after a kexec so clear it when probing each device. Clearing the self hosted bit even when claimed externally is harmless, so do it unconditionally. Reviewed-by: Leo Yan <[email protected]> Reviewed-by: Yeoreum Yun <[email protected]> Signed-off-by: James Clark <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: etm3x: Convert raw base pointer to struct coresight accessJames Clark2025-04-303-21/+20
| | | | | | | | | | | | | | | | | | | | | | This is so that etm3x can use the new claim tag functions which take a csa pointer in a later commit. Reviewed-by: Leo Yan <[email protected]> Reviewed-by: Yeoreum Yun <[email protected]> Signed-off-by: James Clark <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: Add claim tag warnings and debug messagesJames Clark2025-04-302-20/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | Add a dev_dbg() message so that external debugger conflicts are more visible. There are multiple reasons for -EBUSY so a message for this particular one could be helpful. Add errors for and enumerate all the other cases that are impossible. Reviewed-by: Leo Yan <[email protected]> Reviewed-by: Yeoreum Yun <[email protected]> Signed-off-by: James Clark <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: Only check bottom two claim bitsJames Clark2025-04-302-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The use of the whole register and == could break the claim mechanism if any of the other bits are used in the future. The referenced doc "PSCI - ARM DEN 0022D" also says to only read and clear the bottom two bits. Use FIELD_GET() to extract only the relevant part. Reviewed-by: Leo Yan <[email protected]> Reviewed-by: Yeoreum Yun <[email protected]> Signed-off-by: James Clark <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: Convert tag clear function to take a struct csdev_accessJames Clark2025-04-301-11/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The self hosted claim tag will be reset on device probe in a later commit. We'll want to do this before coresight_register() is called so won't have a coresight_device and have to use csdev_access instead. Also make them public and create locked and unlocked versions for later use. These look functions look like they set the whole tags register as one value, but they only set and clear the self hosted bit using a SET/CLR bits mechanism so also rename the functions to reflect this better. Reviewed-by: Leo Yan <[email protected]> Reviewed-by: Yeoreum Yun <[email protected]> Signed-off-by: James Clark <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: core: Disable helpers for devices that fail to enableYabin Cui2025-04-301-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When enabling a SINK or LINK type coresight device fails, the associated helpers should be disabled. Fixes: 6148652807ba ("coresight: Enable and disable helper devices adjacent to the path") Signed-off-by: Yabin Cui <[email protected]> Suggested-by: Suzuki K Poulose <[email protected]> Reviewed-by: James Clark <[email protected]> Reviewed-by: Mike Leach <[email protected]> Reviewed-by: Leo Yan <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: catu: Introduce refcount and spinlock for enabling/disablingYabin Cui2025-04-302-8/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When tracing ETM data on multiple CPUs concurrently via the perf interface, the CATU device is shared across different CPU paths. This can lead to race conditions when multiple CPUs attempt to enable or disable the CATU device simultaneously. To address these race conditions, this patch introduces the following changes: 1. The enable and disable operations for the CATU device are not reentrant. Therefore, a spinlock is added to ensure that only one CPU can enable or disable a given CATU device at any point in time. 2. A reference counter is used to manage the enable/disable state of the CATU device. The device is enabled when the first CPU requires it and is only disabled when the last CPU finishes using it. This ensures the device remains active as long as at least one CPU needs it. Fixes: fcacb5c154ba ("coresight: Introduce support for Coresight Address Translation Unit") Signed-off-by: Yabin Cui <[email protected]> Reviewed-by: James Clark <[email protected]> Reviewed-by: Leo Yan <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| * coresight: Fixes device's owner field for registered using ↵Junhao He2025-04-298-10/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | coresight_init_driver() The coresight_init_driver() of the coresight-core module is called from the sub coresgiht device (such as tmc/stm/funnle/...) module. It calls amba_driver_register() and Platform_driver_register(), which are macro functions that use the coresight-core's module to initialize the caller's owner field. Therefore, when the sub coresight device calls coresight_init_driver(), an incorrect THIS_MODULE value is captured. The sub coesgiht modules can be removed while their callbacks are running, resulting in a general protection failure. Add module parameter to coresight_init_driver() so can be called with the module of the callback. Fixes: 075b7cd7ad7d ("coresight: Add helpers registering/removing both AMBA and platform drivers") Signed-off-by: Junhao He <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
* | intel_th: avoid using deprecated page->mapping, index fieldsLorenzo Stoakes2025-04-152-24/+8
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The struct page->mapping, index fields are deprecated and soon to be only available as part of a folio. It is likely the intel_th code which sets page->mapping, index is was implemented out of concern that some aspect of the page fault logic may encounter unexpected problems should they not. However, the appropriate interface for inserting kernel-allocated memory is vm_insert_page() in a VM_MIXEDMAP. By using the helper function vmf_insert_mixed() we can do this with minimal churn in the existing fault handler. By doing so, we bypass the remainder of the faulting logic. The pages are still pinned so there is no possibility of anything unexpected being done with the pages once established. It would also be reasonable to pre-map everything on fault, however to minimise churn we retain the fault handler. We also eliminate all code which clears page->mapping on teardown as this has now become unnecessary. The MSU code relies on faulting to function correctly, so is by definition dependent on CONFIG_MMU. We avoid spurious reports about compilation failure for unsupported platforms by making this requirement explicit in Kconfig as part of this change too. Signed-off-by: Lorenzo Stoakes <[email protected]> Acked-by: Alexander Shishkin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
* Merge tag 'char-misc-6.15-rc1' of ↵Linus Torvalds2025-04-0141-516/+1904
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char / misc / IIO driver updates from Greg KH: "Here is the big set of char, misc, iio, and other smaller driver subsystems for 6.15-rc1. Lots of stuff in here, including: - loads of IIO changes and driver updates - counter driver updates - w1 driver updates - faux conversions for some drivers that were abusing the platform bus interface - coresight driver updates - rust miscdevice binding updates based on real-world-use - other minor driver updates All of these have been in linux-next with no reported issues for quite a while" * tag 'char-misc-6.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (292 commits) samples: rust_misc_device: fix markup in top-level docs Coresight: Fix a NULL vs IS_ERR() bug in probe misc: lis3lv02d: convert to use faux_device tlclk: convert to use faux_device regulator: dummy: convert to use the faux device interface bus: mhi: host: Fix race between unprepare and queue_buf coresight: configfs: Constify struct config_item_type doc: iio: ad7380: describe offload support iio: ad7380: add support for SPI offload iio: light: Add check for array bounds in veml6075_read_int_time_ms iio: adc: ti-ads7924 Drop unnecessary function parameters staging: iio: ad9834: Use devm_regulator_get_enable() staging: iio: ad9832: Use devm_regulator_get_enable() iio: gyro: bmg160_spi: add of_match_table dt-bindings: iio: adc: Add i.MX94 and i.MX95 support iio: adc: ad7768-1: remove unnecessary locking Documentation: ABI: add wideband filter type to sysfs-bus-iio iio: adc: ad7768-1: set MOSI idle state to prevent accidental reset iio: adc: ad7768-1: Fix conversion result sign iio: adc: ad7124: Benefit of dev = indio_dev->dev.parent in ad7124_parse_channel_config() ...
| * Merge tag 'coresight-next-v6.15' of ↵Greg Kroah-Hartman2025-03-2041-516/+1904
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next Suzuki writes: coresight: updates for Linux v6.15 CoreSight self-hosted tracing driver subsystem update for Linux v6.15. The update includes: - CoreSight trace capture for Panic/Watchdog timeouts - Fixes to ETM4x driver to synchronize register reads as required by the TRM - Support for Qualcomm CoreSight TMC Control Unit driver - Conversion of device locks to raw_spinlock for components that are used by the Perf mode. - Miscellaneous fixes for the subsystem Signed-off-by: Suzuki K Poulose <[email protected]> * tag 'coresight-next-v6.15' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/coresight/linux: (41 commits) Coresight: Fix a NULL vs IS_ERR() bug in probe coresight: configfs: Constify struct config_item_type coresight: docs: Remove target sink from examples coresight/ultrasoc: change smb_drv_data spinlock's type to raw_spinlock_t coresight-tmc: change tmc_drvdata spinlock's type to raw_spinlock_t coresight-replicator: change replicator_drvdata spinlock's type to raw_spinlock_t coresight-funnel: change funnel_drvdata spinlock's type to raw_spinlock_t coresight-etb10: change etb_drvdata spinlock's type to raw_spinlock_t coresight-cti: change cti_drvdata spinlock's type to raw_spinlock_t coresight: change coresight_trace_id_map's lock type to raw_spinlock_t coresight-etm4x: change etmv4_drvdata spinlock type to raw_spinlock_t coresight: change coresight_device lock type to raw_spinlock_t coresight: add verification process for coresight_etm_get_trace_id Coresight: Add Coresight TMC Control Unit driver dt-bindings: arm: Add Coresight TMC Control Unit hardware Coresight: Change functions to accept the coresight_path Coresight: Change to read the trace ID from coresight_path Coresight: Allocate trace ID after building the path Coresight: Introduce a new struct coresight_path Coresight: Use coresight_etm_get_trace_id() in traceid_show() ...
| | * Coresight: Fix a NULL vs IS_ERR() bug in probeDan Carpenter2025-03-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The devm_platform_get_and_ioremap_resource() function doesn't return NULL, it returns error pointers. Update the checking to match. Fixes: f78d206f3d73 ("Coresight: Add Coresight TMC Control Unit driver") Signed-off-by: Dan Carpenter <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| | * coresight: configfs: Constify struct config_item_typeChristophe JAILLET2025-03-121-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'struct config_item_type' is not modified in this driver. These structures are only used with config_group_init_type_name() which takes a "const struct config_item_type *" as a 3rd argument or with struct config_group.cg_item.ci_type which is also a "const struct config_item_type *". Constifying this structure moves some data to a read-only section, so increase overall security, especially when the structure holds some function pointers. On a x86_64, with allmodconfig: Before: ====== text data bss dec hex filename 4904 1376 136 6416 1910 drivers/hwtracing/coresight/coresight-syscfg-configfs.o After: ===== text data bss dec hex filename 5264 1120 16 6400 1900 drivers/hwtracing/coresight/coresight-syscfg-configfs.o Signed-off-by: Christophe JAILLET <[email protected]> Reviewed-by: James Clark <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/1011717e5ed35ec12113a0d8c233823e820fb524.1723368522.git.christophe.jaillet@wanadoo.fr
| | * coresight/ultrasoc: change smb_drv_data spinlock's type to raw_spinlock_tYeoreum Yun2025-03-102-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In ultrasoc-smb drivers, smb_drv_data->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since smb__drv_data->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type smb_drv_data->spinlock in ultrasoc-smb drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Reviewed-by: James Clark <[email protected]> Signed-off-by: Yeoreum Yun <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| | * coresight-tmc: change tmc_drvdata spinlock's type to raw_spinlock_tYeoreum Yun2025-03-104-54/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In coresight-tmc drivers, tmc_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since tmc_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type tmc_drvdata->spinlock in coresight-tmc drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Reviewed-by: James Clark <[email protected]> Reviewed-by: Mike Leach <[email protected]> Signed-off-by: Yeoreum Yun <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| | * coresight-replicator: change replicator_drvdata spinlock's type to ↵Yeoreum Yun2025-03-101-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | raw_spinlock_t In coresight-replicator drivers, replicator_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since replicator_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type replicator_drvdata->spinlock in coresight-replicator drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Reviewed-by: James Clark <[email protected]> Reviewed-by: Mike Leach <[email protected]> Signed-off-by: Yeoreum Yun <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| | * coresight-funnel: change funnel_drvdata spinlock's type to raw_spinlock_tYeoreum Yun2025-03-101-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In coresight-funnel drivers, cti_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since funnel_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type funnel_drvdata->spinlock in coresight-funnel drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Signed-off-by: Yeoreum Yun <[email protected]> Reviewed-by: James Clark <[email protected]> Reviewed-by: Mike Leach <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| | * coresight-etb10: change etb_drvdata spinlock's type to raw_spinlock_tYeoreum Yun2025-03-101-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In coresight-etb10 drivers, etb_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since etb_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type etb_drvdata->spinlock in coresight-etb10 drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Reviewed-by: James Clark <[email protected]> Reviewed-by: Mike Leach <[email protected]> Signed-off-by: Yeoreum Yun <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| | * coresight-cti: change cti_drvdata spinlock's type to raw_spinlock_tYeoreum Yun2025-03-103-61/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In coresight-cti drivers, cti_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since cti_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type cti_drvdata->spinlock in coresight-cti drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Reviewed-by: James Clark <[email protected]> Reviewed-by: Mike Leach <[email protected]> Signed-off-by: Yeoreum Yun <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| | * coresight: change coresight_trace_id_map's lock type to raw_spinlock_tYeoreum Yun2025-03-102-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | coresight_trace_id_map->lock can be acquired while coresight devices' drvdata_lock. But the drvdata_lock can be raw_spinlock_t (i.e) coresight-etm4x. To address this, change type of coresight_trace_id_map->lock to raw_spinlock_t Signed-off-by: Yeoreum Yun <[email protected]> Reviewed-by: James Clark <[email protected]> Reviewed-by: Mike Leach <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| | * coresight-etm4x: change etmv4_drvdata spinlock type to raw_spinlock_tYeoreum Yun2025-03-105-140/+140
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In coresight-etm4x drivers, etmv4_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since etmv4_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type etmv4_drvdata->spinlock in coresight-etm4x drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Signed-off-by: Yeoreum Yun <[email protected]> Reviewed-by: James Clark <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| | * coresight: change coresight_device lock type to raw_spinlock_tYeoreum Yun2025-03-101-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | coresight_device->cscfg_csdev_lock can be held during __schedule() by perf_event_task_sched_out()/in(). Since coresight->cscfg_csdev_lock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type of coresight_device->cscfg_csdev_lock from spinlock_t to raw_spinlock_t. Reviewed-by: James Clark <[email protected]> Reviewed-by: Mike Leach <[email protected]> Signed-off-by: Yeoreum Yun <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| | * coresight: add verification process for coresight_etm_get_trace_idJie Gan2025-03-101-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The coresight_etm_get_trace_id function is a global function. The verification process for 'csdev' is required prior to its usage. Fixes: c367a89dec26 ("Coresight: Add trace_id function to retrieving the trace ID") Signed-off-by: Jie Gan <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| | * Coresight: Add Coresight TMC Control Unit driverJie Gan2025-03-044-0/+379
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Coresight TMC Control Unit hosts miscellaneous configuration registers which control various features related to TMC ETR sink. Based on the trace ID, which is programmed in the related CTCU ATID register of a specific ETR, trace data with that trace ID gets into the ETR buffer, while other trace data gets dropped. Enabling source device sets one bit of the ATID register based on source device's trace ID. Disabling source device resets the bit according to the source device's trace ID. Reviewed-by: James Clark <[email protected]> Signed-off-by: Jie Gan <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| | * Coresight: Change functions to accept the coresight_pathJie Gan2025-03-044-33/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify following functions to accept the coresight_path. Devices in the path can read data from coresight_path if needed. - coresight_enable_path - coresight_disable_path - coresight_get_source - coresight_get_sink - coresight_enable_helpers - coresight_disable_helpers Signed-off-by: Jie Gan <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| | * Coresight: Change to read the trace ID from coresight_pathJie Gan2025-03-049-107/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The source device can directly read the trace ID from the coresight_path which result in etm_read_alloc_trace_id and etm4_read_alloc_trace_id being deleted. Co-developed-by: James Clark <[email protected]> Signed-off-by: James Clark <[email protected]> Signed-off-by: Jie Gan <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| | * Coresight: Allocate trace ID after building the pathJie Gan2025-03-044-3/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The trace_id will be stored in coresight_path instead of being declared everywhere and allocated after building the path. Co-developed-by: James Clark <[email protected]> Signed-off-by: James Clark <[email protected]> Signed-off-by: Jie Gan <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| | * Coresight: Introduce a new struct coresight_pathJie Gan2025-03-045-32/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a new strcuture, 'struct coresight_path', to store the data that utilized by the devices in the path. The coresight_path will be built/released by coresight_build_path/coresight_release_path functions. Signed-off-by: Jie Gan <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| | * Coresight: Use coresight_etm_get_trace_id() in traceid_show()James Clark2025-03-042-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the new API, coresight_etm_get_trace_id, to read the traceid of the ETM device when call traceid_show via sysfs node. Signed-off-by: James Clark <[email protected]> Reviewed-by: James Clark <[email protected]> Signed-off-by: Jie Gan <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| | * Coresight: Add trace_id function to retrieving the trace IDJie Gan2025-03-046-1/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add 'trace_id' function pointer in coresight_ops. It's responsible for retrieving the device's trace ID. Co-developed-by: James Clark <[email protected]> Signed-off-by: James Clark <[email protected]> Reviewed-by: James Clark <[email protected]> Signed-off-by: Jie Gan <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
| | * coresight-tpdm: Add support to enable the lane for MCMB TPDMTao Zhang2025-02-262-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the sysfs file to set/get the enablement of the lane. For MCMB configurations, the field "E_LN" in CMB_CR register is the individual lane enables. MCMB lane N is enabled for trace generation when M_CMB_CR.E=1 and M_CMB_CR.E_LN[N]=1. For lanes that are not implemented on a given MCMB configuration, the corresponding bits of this field read as 0 and ignore writes. Signed-off-by: Tao Zhang <[email protected]> Signed-off-by: Mao Jinlong <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected]
generated by cgit (git 2.51.2) at 2025-12-01 11:21:18 +0000