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path: root/drivers/gpu/drm/amd/display/modules/freesync
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* drm/amd/display: Added case for when RR equals panel's max RR using freesyncHarold Sun2025-06-301-0/+8
| | | | | | | | | | | | | | | | [WHY] Rounding error sometimes occurs when the refresh rate is equal to a panel's max refresh rate, causing HDMI compliance failures. [HOW] Added a case so that we round up to avoid v_total_min to be below a panel's minimum bound. Reviewed-by: Jun Lei <[email protected]> Signed-off-by: Harold Sun <[email protected]> Signed-off-by: Ray Wu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Remove redundant macro of refresh rateWeiguang Li2025-06-241-1/+1
| | | | | | | | | | | | [Why&How] Found that we add redundant macro on refresh rate when calculating vtotal, so we remove it. Reviewed-by: Robin Chen <[email protected]> Signed-off-by: Weiguang Li <[email protected]> Signed-off-by: Fangzhi Zuo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Remove unused freesync functionsDr. David Alan Gilbert2025-02-131-137/+0
| | | | | | | | | | | | | | | | | | | | | | | | | mod_freesync_get_vmin_vmax() and mod_freesync_get_v_position() were added in 2017 by commit 72ada5f76939 ("drm/amd/display: FreeSync Auto Sweep Support") mod_freesync_is_valid_range() was added in 2018 by commit e80e94460841 ("drm/amd/display: add method to check for supported range") mod_freesync_get_settings() was added in 2018 by commit a3e1737ed61c ("drm/amd/display: Implement stats logging") and mod_freesync_calc_field_rate_from_timing() was added in 2020 by commit 49c70ece54b0 ("drm/amd/display: Change input parameter for set_drr") None of these have been used. Remove them. Signed-off-by: Dr. David Alan Gilbert <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Limit VTotal range to max hw cap minus fpDillon Varone2024-12-021-1/+12
| | | | | | | | | | | | | | | | | [WHY & HOW] Hardware does not support the VTotal to be between fp2 lines of the maximum possible VTotal, so add a capability flag to track it and apply where necessary. Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Cc: [email protected] Reviewed-by: Jun Lei <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Alex Hung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: avoid divided by zeroCharlene Liu2024-11-041-0/+3
| | | | | | | | | | | [why] insert divided by zero protection Reviewed-by: Alvin Lee <[email protected]> Signed-off-by: Charlene Liu <[email protected]> Signed-off-by: Zaeem Mohamed <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Display lost signal on playing videopo-tchen2024-10-071-3/+14
| | | | | | | | | | | | | | | | | | [Why] When Source extend the vblank to reach the minimum panel refresh rate, the vtotal length could have 1 line longer than the maximum supported vtotal. The reason is we optimized the vtotal/refresh-rate calculation to get more accurate vtotal number by rounding the calculation result. But when the target refresh rate is the minimum refresh rate, the vtotal result could be round up and over the maximum supported vtotal. Reviewed-by: Anthony Koo <[email protected]> Signed-off-by: po-tchen <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Round calculated vtotalRobin Chen2024-09-181-1/+1
| | | | | | | | | | | | | | | [WHY] The calculated vtotal may has 1 line deviation. To get precisely vtotal number, round the vtotal result. Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Cc: [email protected] Reviewed-by: Anthony Koo <[email protected]> Signed-off-by: Robin Chen <[email protected]> Signed-off-by: Alex Hung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fix possible overflow in integer multiplicationAlex Hung2024-07-011-1/+1
| | | | | | | | | | | | | | | [WHAT & HOW] Integer multiplies integer may overflow in context that expects an expression of unsigned/siged long long (64 bits). This can be fixed by casting integer to unsigned/siged long long to force 64 bits results. This fixes 26 OVERFLOW_BEFORE_WIDEN issues reported by Coverity. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Jerry Zuo <[email protected]> Signed-off-by: Alex Hung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Remove wrong signal from vrr calculationRodrigo Siqueira2024-03-201-1/+1
| | | | | | | | | | | | In some of the merge conflict fixes, one '+' was accidentally left at the beginning of the line. Fortunately, this did not cause any major issues since it acted as a number signal. This commit addresses this issue by removing the extra '+'. Acked-by: Wayne Lin <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add comments to v_total calculation and drop legacy TODORodrigo Siqueira2024-03-201-2/+2
| | | | | | | | | | | | [WHY & HOW] This commit just adds some simple comments to help understand the calculation of V total duration for Freesync. Also, remove a legacy TODO comment from link service type. Acked-by: Alex Hung <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Support long vblank featureRobin Chen2024-03-201-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [WHY] We want to support low hz case, but the original vtotal/vtotal_min/vtotal_max can't support more than 0x7FFF. [HOW] We use the 2 HW reg to contorl long vblank case. 1. OTG_V_COUNT_STOP_CONTROL -> vcount_stop 2. OTG_V_COUNT_STOP_CONTROL2 -> vcount_stop_timer vcount_stop define from which line we stop using vcount and start using vcount2. vcount_stop_timer define how long we use vcount2. Ex: Vtotal = 7 OTG_V_COUNT_STOP_CONTROL = 4 OTG_V_COUNT_STOP_CONTROL2 = 5 time : 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 vcount : 0, 1, 2, 3, - - - - - 4, 5, 6 vcount2 : 0, 1, 2, 3, 4, Reviewed-by: Jun Lei <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: ChunTao Tso <[email protected]> Signed-off-by: Robin Chen<[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fix freesync.c codestyleMarcelo Mendes Spessoto Junior2024-01-051-2/+2
| | | | | | | Remove braces for single statement if expression for freesync.c file Signed-off-by: Marcelo Mendes Spessoto Junior <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Send PQ bit in AMD VSIFKrunoslav Kovac2023-11-171-2/+4
| | | | | | | | | | | | [WHY & HOW] PB9 bit 5 was added to signal PQ EOTF in AMD vendor specific infoframe. This change sets it when appropriate. Reviewed-by: Aric Cyr <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Krunoslav Kovac <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: VSIF v3 set Max Refresh RateMuhammad Ansari2023-10-091-7/+2
| | | | | | | | | | | | | | | | [WHY] FreeSync spec requires PB8 and PB12 to be set to nominal refresh rate regardless of fixed rate or variable [HOW] Removed the condition that checks and overwrites max refresh rate and set PB8/PB12 to be set to max refresh rate always Reviewed-by: Anthony Koo <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Muhammad Ansari <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: prevent potential division by zero errorsHamza Mahfooz2023-09-061-3/+6
| | | | | | | | | | | | | | There are two places in apply_below_the_range() where it's possible for a divide by zero error to occur. So, to fix this make sure the divisor is non-zero before attempting the computation in both cases. Cc: [email protected] Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2637 Fixes: a463b263032f ("drm/amd/display: Fix frames_to_insert math") Fixes: ded6119e825a ("drm/amd/display: Reinstate LFC optimization") Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Limit Minimum FreeSync Refresh RateAustin Zheng2023-06-151-2/+9
| | | | | | | | | | | | | | | Why: Some EDIDs report a minimum refresh rate lower than what HW can support How: Add a check to calculate minimum supported refresh rate with current timing and use that as the minimum if a lower one is passed in Acked-by: Stylon Wang <[email protected]> Signed-off-by: Austin Zheng <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: remove unused variable oldest_indexTom Rix2023-04-181-4/+0
| | | | | | | | | | | | | cpp_check reports drivers/gpu/drm/amd/display/modules/freesync/freesync.c:1143:17: style: Variable 'oldest_index' is assigned a value that is never used. [unreadVariable] oldest_index = 0; ^ This variable is not used so remove. Signed-off-by: Tom Rix <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: remove unused average_render_time_in_us and i variablesTom Rix2023-04-111-14/+0
| | | | | | | | | | | | | clang with W=1 reports drivers/gpu/drm/amd/amdgpu/../display/modules/freesync/freesync.c:1132:15: error: variable 'average_render_time_in_us' set but not used [-Werror,-Wunused-but-set-variable] unsigned int average_render_time_in_us = 0; ^ This variable is not used so remove it, which caused i to be unused so remove that as well. Signed-off-by: Tom Rix <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* Revert "drm/amd/display: Fix FreeSync active bit issue"Aric Cyr2023-02-281-9/+3
| | | | | | | | | | | | | | This reverts commit 6cfb6df2d645c00513ecf17832928e08979fa953. [Why & How] Original change causes black screen. Revert until fix is available. Reviewed-by: Aric Cyr <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fix FreeSync active bit issueLeo (Hanghong) Ma2023-02-141-3/+9
| | | | | | | | | | | | | | [Why] The FreeSync active bit unconditionally set in HDMI VSIF. [How] Set this bit to true when FAMS is enable on desktop. Reviewed-by: Felipe Clark <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Leo (Hanghong) Ma <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: set active bit for desktop with VSDBv3Dillon Varone2023-01-171-6/+14
| | | | | | | | | | | When using freesync on desktop, need to set freesync active bit for AMD VSDBv3 infopacket. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Martin Leung <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Remove unused codeRodrigo Siqueira2023-01-171-44/+0
| | | | | | | | Remove some code that is never used from freesync file. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Set correct EOTF and Gamut flag in VRR infoMike Hsieh2022-11-091-4/+4
| | | | | | | | | | | [Why] FreeSync always use G2.2 EOTF and Native gamut [How] Set EOTF and Gamut flags accordingly Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Mike Hsieh <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fix HDMI VSIF V3 incorrect issueLeo Ma2022-08-101-12/+3
| | | | | | | | | | | | | | | [Why] Reported from customer the checksum in AMD VSIF V3 is incorrect and causing blank screen issue. [How] Fix the packet length issue on AMD HDMI VSIF V3. Reviewed-by: Anthony Koo <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Leo Ma <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Move all linux includes into OS typesHarry Wentland2022-07-051-2/+0
| | | | | | | | | Move all linux includes into OS types. Acked-by: Alan Liu <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add vrr_active_variable to dc_stream_updateHarry VanZyllDeJong2022-06-151-1/+1
| | | | | | | | | | | | | | | [WHY] The display driver on some OSes need to track it in order to perform memory clock switching decisions. [HOW] Propagate the vrr active state to dirty bit so that on mode set it disables dynamic memory clock switching. Acked-by: Alan Liu <[email protected]> Signed-off-by: Harry VanZyllDeJong <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Firmware assisted MCLK switch and FSFelipe Clark2022-06-151-0/+5
| | | | | | | | | | | | | | | | | | | [WHY] Memory clock switching has great potential for power savings. [HOW] The driver code was modified to notify the DMCUB firmware that it should stretch the vertical blank of frames when a memory clock switch is about to start so that no blackouts happen on the screen due to unavailability of the frame buffer. The driver logic to determine when such firmware assisted strategy can be initiated is also implemented and consists on checking prerequisites of the feature. Acked-by: Alan Liu <[email protected]> Signed-off-by: Felipe Clark <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fix inconsistent timestamp typeAngus Wang2022-04-121-1/+4
| | | | | | | | | | | | | | | | | | [WHY] An unsigned int timestamp variable is assigned with an unsigned long long value. Also, the assignment directly converts the tick value to us without using built-in get elapsed time function. [HOW] Cast the assigned value correctly and also use built-in function to get the timestamp in the unit we want. v2: squash in 64 bit division fix Reviewed-by: Aric Cyr <[email protected]> Acked-by: Pavle Kotarac <[email protected]> Signed-off-by: Angus Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: fix 64 bit divide in freesync codeAlex Deucher2022-04-111-1/+1
| | | | | | | | | | | | | Use div_u64() rather than a a 64 bit divide. Fixes: 3fe5739db48843 ("drm/amd/display: Add flip interval workaround") Reviewed-by: Nathan Chancellor <[email protected]> Reported-by: kernel test robot <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: Angus Wang <[email protected]> Cc: Anthony Koo <[email protected]> Cc: Aric Cyr <[email protected]> Cc: Nathan Chancellor <[email protected]>
* drm/amd/dc: remove duplicate includeLv Ruyi2022-04-061-1/+0
| | | | | | | | 'dm_services.h' included in 'freesync,c' is duplicated, so remove one. Reported-by: Zeal Robot <[email protected]> Signed-off-by: Lv Ruyi <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add flip interval workaroundAngus Wang2022-04-051-1/+73
| | | | | | | | | | | | | | | | | | | | [WHY] Some games experience low FPS issues when FreeSync is on and VSync is toggled to half refresh rate. [HOW] First create a function to determine workaround conditions, which is when we detect 2 or more VSync interrupts between flips and a very short VSync to flip interval. We do the workaround during VSync interrupts and set the v_total_max and min to nominal. We also cleanup after we exit the game. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Angus Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Get ceiling for v_total calcGuo, Bing2021-10-281-3/+12
| | | | | | | | | | Updating certain variable blanking calculations to use ceiling function. Reviewed-by: Chris Park <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Acked-by: Agustin Gutierrez <[email protected]> Signed-off-by: Bing Guo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: disable desktop VRR when using older flip modelhvanzyll2021-05-271-10/+19
| | | | | | | | | | | | | | | | | [WHY] OS uses older flip model which does not work with desktop VRR causing memory allocations at the wrong IRQ level. [HOW] Checks added to flip model to verify model is 2.2 or greater when doing any of the desktop VRR checks for full updates. This prevents full updates when VRR changes until a mode change. Signed-off-by: Harry VanZyllDeJong <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fixed corruption on 4K tvsHarry VanZyllDeJong2021-04-091-2/+2
| | | | | | | | | | | | | | | | | | | [WHY] When on the desktop freesync is not enabled, doing a frame stretch causes the TV to display undesired output. [HOW] By changing the logic so that when ever fresync is supported the TV is notified we are in fressync instead on a non fresync state. Signed-off-by: Harry VanZyllDeJong <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Anthony Koo <[email protected]> Acked-by: Jun Lei <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Change input parameter for set_drrAlvin Lee2021-04-091-11/+26
| | | | | | | | | | | | | | [Why] Change set_drr to pass in the entire dc_crtc_timing_adjust structure instead of passing in the parameters individually. This is to more easily pass in required parameters in the adjust structure when it gets updated. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Add flag for building infopacketMax.Tseng2021-03-021-2/+26
| | | | | | | | | | | [why] Add flag to build infopacket in SDP v1.3 format Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Max.Tseng <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Set FixRate bit in VSIF V3AMD\ramini2020-12-091-4/+8
| | | | | | | | | | | | | | | [Why] Signal FreeSync display that we are in Fixed Rate mode, and expand the FreeSync range to 1024. [How] Set the new bit in SB16:bit0, and augment the min and max refresh rate with 2 extra bits. Signed-off-by: AMD\ramini <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Eryk Brol <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Implement VSIF V3 extended refresh rate featureReza Amini2020-12-091-18/+82
| | | | | | | | | | | | | [Why] Implement feature of VSIF V3 [How] Set refresh rate MSB for extended range Signed-off-by: Reza Amini <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Eryk Brol <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: FreeSync not active near lower bound of non-LFC monitor rangeAric Cyr2020-10-051-4/+6
| | | | | | | | | | | | | | | [Why] On narrow range monitors without LFC, a margin prevents good utilization of the available range. [How] Decrease the margin for exiting fixed mode and fix the frame counter to reset if a non-consecutive render is found. Signed-off-by: Aric Cyr <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Eryk Brol <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fixed comments (uniform style)Felipe2020-10-051-22/+23
| | | | | | | | | | | | | | | | | | | [WHY] This change was implemented because the comment style was not uniform across the file. In some lines comments were initiated with // and in others they were in between /* ... */. Additionally, the style for multi-line comments was also not uniform and some comment lines were missing the space between the opening /* and the first word of the comment. [HOW] All comments are now in between /*.../*, multi line comments also use /*...*/ and for every comment there is now a space between the opening /* and the first word of the comment. Signed-off-by: Felipe <[email protected]> Acked-by: Eryk Brol <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fix LFC multiplier changing erraticallyAnthony Koo2020-08-101-7/+29
| | | | | | | | | | | | | | | | | | | | [Why] 1. There is a calculation that is using frame_time_in_us instead of last_render_time_in_us to calculate whether choosing an LFC multiplier would cause the inserted frame duration to be outside of range. 2. We do not handle unsigned integer subtraction correctly and it underflows to a really large value, which causes some logic errors. [How] 1. Fix logic to calculate 'within range' using last_render_time_in_us 2. Split out delta_from_mid_point_delta_in_us calculation to ensure we don't underflow and wrap around Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Allow asic specific FSFT timing optimizationReza Amini2020-08-061-1/+4
| | | | | | | | | | | | | [Why] Each asic can optimize best based on its capabilities [How] Optimizing timing for a new pixel clock Signed-off-by: Reza Amini <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Eryk Brol <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Implement AMD VSIF V3Reza Amini2020-07-211-0/+41
| | | | | | | | | | | | | [Why] To support V3 [How] Generate new VSIF for V3 Signed-off-by: Reza Amini <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Send VSIF on unsupported modes on DALJaehyun Chung2020-07-081-1/+1
| | | | | | | | | | | | | | | | [Why] Current DAL behaviour is to not send VSIF if mode does not support VRR (ie. FS range is < 10Hz). However, we should still set FS Native Color Active bit in some unsupported mode cases. [How] Remove check for if VRR is supported before building infopacket. Signed-off-by: Jaehyun Chung <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Eryk Brol <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fix incorrect rounding for 10Hz refresh rangeJaehyun Chung2020-07-021-27/+8
| | | | | | | | | | | | | | | | [Why] In cases where refresh range is slightly below 10, FreeSync is not active or supported. Need to round values before checking refresh range in order to have FreeSync supported in these cases. [How] Remove redundant values and round values before checking valid refresh range. Signed-off-by: Jaehyun Chung <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Anthony Koo <[email protected]> Acked-by: Eryk Brol <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Change infopacket type programmingHaiyi Zhou2020-04-221-8/+93
| | | | | | | | | | | | | | | | [Why] Certain displays may experience blanking if infopacket max range does not equal nominal refresh rate. [How] Add additional infopacket versions to program range to full or forced range in freesync states. This does not change the vrr logic. Signed-off-by: Haiyi Zhou <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: LFC not working on 2.0x range monitors (v2)Aric Cyr2020-03-311-15/+19
| | | | | | | | | | | | | | | | | | [Why] Nominal pixel clock and EDID information differ in precision so although monitor reports maximum refresh is 2x minimum, LFC was not being enabled. [How] Use minimum refresh rate as nominal/2 when EDID dictates that min refresh = max refresh/2. v2: squash in 64 bit divide fix Signed-off-by: Aric Cyr <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Only round InfoFrame refresh ratesAric Cyr2020-02-251-6/+2
| | | | | | | | | | | | | | | | [Why] When calculating nominal refresh rates, don't round. Only the VSIF needs to be rounded. [How] Revert rounding change for nominal and just round when forming the FreeSync VSIF. Signed-off-by: Aric Cyr <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fixed comment stylingHaiyi Zhou2020-01-221-1/+1
| | | | | | | | | Switched to C-style comments for consistency Signed-off-by: Haiyi Zhou <[email protected]> Reviewed-by: Reza Amini <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* drm/amd/display: Fix 300Hz Freesync bugAlvin Lee2020-01-161-1/+2
| | | | | | | | | | | Needed to reprogram vblank_start in dml properly in order to get the correct dlg params to program VTG. Signed-off-by: Alvin Lee <[email protected]> Reviewed-by: Martin Leung <[email protected]> Acked-by: Harry Wentland <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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