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Remove more duplicated defines and move some in sid.h for coherence with
CIK.
Signed-off-by: Alexandre Demers <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This cleans up DCE6.
I added some minor tweaks taken from CIK to exit early
v2: minor fixes (Alex)
Signed-off-by: Alexandre Demers <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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PACKET3 is already in sid.h, as it is done under cikd.h for CIK
Signed-off-by: Alexandre Demers <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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By replacing VGA_VSTATUS_CNTL by VGA_RENDER_CONTROL__VGA_VSTATUS_CNTL_MASK,
we also need to fix its usage in GMC6.
Note: VGA_VSTATUS_CNTL's binary value was inverted in dce_6_0_sh_mask.h,
so we need to invert its value where it was used.
Signed-off-by: Alexandre Demers <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Send a few GFX6 defines where it's used in GFX6.
Signed-off-by: Alexandre Demers <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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For coherence with DCE8 et DCE10, add or move some values under sid.h
and remove duplicated from si_enums.h.
Signed-off-by: Alexandre Demers <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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By wiring up sid.h in GFX6, we end up with a few duplicated defines such as
the golden registers. Let's clean this up.
[TAHITI,VERDE, HAINAN]_GB_ADDR_CONFIG_GOLDEN were defined both in sid.h
and under si_enums.h, with different values. Keep the values used under radeon
and move them under gfx_v6_0.c where they are used (as it is done under cik)
Signed-off-by: Alexandre Demers <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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The KFD VMID assignment was hard-coded in a few places. Consolidate that in
a single variable adev->vm_manager.first_kfd_vmid. The value is still
assigned in gmc-ip-version-specific code.
Signed-off-by: Felix Kuehling <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Add support for DRM_FORMAT_{A,X}BGR8888 in amdgpu with amd dc disabled
(v2) Crossbar registers are defined and used to swap red and blue channels,
keeping the existing coding style in each of the dce modules.
After setting crossbar bits in fb_swap, use bitwise OR for big endian
where required in DCE6 and DCE8 which do not rely on REG_SET_FIELD()
Signed-off-by: Mauro Rossi <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Flora Cui <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Flora Cui <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Port of SI DCE v6 over to new AMDGPU headers. Tested on a
Tahiti with GNOME through various hot plugs/rotations/sizes/fullscreen/windowed and
staging drm/xf86-video-amdgpu.
(v2) Re-factored to remove formatting changes to si_enums.h
as well rename various defines.
(v3) Rebase on upstream
Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Port the GMC v6 driver over to the new SI headers.
Tested with a Tahiti SI ASIC.
(v2) Fixed a couple of typos (in commented code) and moved
defines to si_enums.h
Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Add missing gca MMIO registers and defines necessary for the
next patch which re-works a lot of gfx v6 to use the new SI
headers.
Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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