aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/crypto
Commit message (Collapse)AuthorAgeFilesLines
* crypto: ccp - Always pass in an error pointer to ↵Borislav Petkov (AMD)2025-09-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | __sev_platform_shutdown_locked() When 9770b428b1a2 ("crypto: ccp - Move dev_info/err messages for SEV/SNP init and shutdown") moved the error messages dumping so that they don't need to be issued by the callers, it missed the case where __sev_firmware_shutdown() calls __sev_platform_shutdown_locked() with a NULL argument which leads to a NULL ptr deref on the shutdown path, during suspend to disk: #PF: supervisor read access in kernel mode #PF: error_code(0x0000) - not-present page PGD 0 P4D 0 Oops: Oops: 0000 [#1] SMP NOPTI CPU: 0 UID: 0 PID: 983 Comm: hib.sh Not tainted 6.17.0-rc4+ #1 PREEMPT(voluntary) Hardware name: Supermicro Super Server/H12SSL-i, BIOS 2.5 09/08/2022 RIP: 0010:__sev_platform_shutdown_locked.cold+0x0/0x21 [ccp] That rIP is: 00000000000006fd <__sev_platform_shutdown_locked.cold>: 6fd: 8b 13 mov (%rbx),%edx 6ff: 48 8b 7d 00 mov 0x0(%rbp),%rdi 703: 89 c1 mov %eax,%ecx Code: 74 05 31 ff 41 89 3f 49 8b 3e 89 ea 48 c7 c6 a0 8e 54 a0 41 bf 92 ff ff ff e8 e5 2e 09 e1 c6 05 2a d4 38 00 01 e9 26 af ff ff <8b> 13 48 8b 7d 00 89 c1 48 c7 c6 18 90 54 a0 89 44 24 04 e8 c1 2e RSP: 0018:ffffc90005467d00 EFLAGS: 00010282 RAX: 00000000ffffff92 RBX: 0000000000000000 RCX: 0000000000000000 ^^^^^^^^^^^^^^^^ and %rbx is nice and clean. Call Trace: <TASK> __sev_firmware_shutdown.isra.0 sev_dev_destroy psp_dev_destroy sp_destroy pci_device_shutdown device_shutdown kernel_power_off hibernate.cold state_store kernfs_fop_write_iter vfs_write ksys_write do_syscall_64 entry_SYSCALL_64_after_hwframe Pass in a pointer to the function-local error var in the caller. With that addressed, suspending the ccp shows the error properly at least: ccp 0000:47:00.1: sev command 0x2 timed out, disabling PSP ccp 0000:47:00.1: SEV: failed to SHUTDOWN error 0x0, rc -110 SEV-SNP: Leaking PFN range 0x146800-0x146a00 SEV-SNP: PFN 0x146800 unassigned, dumping non-zero entries in 2M PFN region: [0x146800 - 0x146a00] ... ccp 0000:47:00.1: SEV-SNP firmware shutdown failed, rc -16, error 0x0 ACPI: PM: Preparing to enter system sleep state S5 kvm: exiting hardware virtualization reboot: Power down Btw, this driver is crying to be cleaned up to pass in a proper I/O struct which can be used to store information between the different functions, otherwise stuff like that will happen in the future again. Fixes: 9770b428b1a2 ("crypto: ccp - Move dev_info/err messages for SEV/SNP init and shutdown") Signed-off-by: Borislav Petkov (AMD) <[email protected]> Cc: <[email protected]> Reviewed-by: Ashish Kalra <[email protected]> Acked-by: Tom Lendacky <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
* Merge tag 'v6.17-p1' of ↵Linus Torvalds2025-07-3190-1544/+2336
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 Pull crypto update from Herbert Xu: "API: - Allow hash drivers without fallbacks (e.g., hardware key) Algorithms: - Add hmac hardware key support (phmac) on s390 - Re-enable sha384 in FIPS mode - Disable sha1 in FIPS mode - Convert zstd to acomp Drivers: - Lower priority of qat skcipher and aead - Convert aspeed to partial block API - Add iMX8QXP support in caam - Add rate limiting support for GEN6 devices in qat - Enable telemetry for GEN6 devices in qat - Implement full backlog mode for hisilicon/sec2" * tag 'v6.17-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (116 commits) crypto: keembay - Use min() to simplify ocs_create_linked_list_from_sg() crypto: hisilicon/hpre - fix dma unmap sequence crypto: qat - make adf_dev_autoreset() static crypto: ccp - reduce stack usage in ccp_run_aes_gcm_cmd crypto: qat - refactor ring-related debug functions crypto: qat - fix seq_file position update in adf_ring_next() crypto: qat - fix DMA direction for compression on GEN2 devices crypto: jitter - replace ARRAY_SIZE definition with header include crypto: engine - remove {prepare,unprepare}_crypt_hardware callbacks crypto: engine - remove request batching support crypto: qat - flush misc workqueue during device shutdown crypto: qat - enable rate limiting feature for GEN6 devices crypto: qat - add compression slice count for rate limiting crypto: qat - add get_svc_slice_cnt() in device data structure crypto: qat - add adf_rl_get_num_svc_aes() in rate limiting crypto: qat - relocate service related functions crypto: qat - consolidate service enums crypto: qat - add decompression service for rate limiting crypto: qat - validate service in rate limiting sysfs api crypto: hisilicon/sec2 - implement full backlog mode for sec ...
| * crypto: keembay - Use min() to simplify ocs_create_linked_list_from_sg()Thorsten Blum2025-07-271-2/+2
| | | | | | | | | | | | | | | | Use min() to simplify ocs_create_linked_list_from_sg() and improve its readability. Signed-off-by: Thorsten Blum <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: hisilicon/hpre - fix dma unmap sequenceZhiqi Song2025-07-271-2/+6
| | | | | | | | | | | | | | | | | | | | Perform DMA unmapping operations before processing data. Otherwise, there may be unsynchronized data accessed by the CPU when the SWIOTLB is enabled. Signed-off-by: Zhiqi Song <[email protected]> Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - make adf_dev_autoreset() staticGiovanni Cabiddu2025-07-272-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | The function adf_dev_autoreset() is only used within adf_aer.c and does not need to be exposed outside the compilation unit. Make it static and remove it from the header adf_common_drv.h. This does not introduce any functional change. Signed-off-by: Giovanni Cabiddu <[email protected]> Reviewed-by: Ahsan Atta <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: ccp - reduce stack usage in ccp_run_aes_gcm_cmdArnd Bergmann2025-07-271-77/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A number of functions in this file have large structures on the stack, ccp_run_aes_gcm_cmd() being the worst, in particular when KASAN is enabled on gcc: drivers/crypto/ccp/ccp-ops.c: In function 'ccp_run_sha_cmd': drivers/crypto/ccp/ccp-ops.c:1833:1: error: the frame size of 1136 bytes is larger than 1024 bytes [-Werror=frame-larger-than=] drivers/crypto/ccp/ccp-ops.c: In function 'ccp_run_aes_gcm_cmd': drivers/crypto/ccp/ccp-ops.c:914:1: error: the frame size of 1632 bytes is larger than 1024 bytes [-Werror=frame-larger-than=] Avoid the issue by using dynamic memory allocation in the worst one of these. Signed-off-by: Arnd Bergmann <[email protected]> Acked-by: Tom Lendacky <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - refactor ring-related debug functionsGiovanni Cabiddu2025-07-271-9/+14
| | | | | | | | | | | | | | | | | | | | | | Refactor the functions `adf_ring_start()` and `adf_ring_next()` to improve readability. This does not introduce any functional change. Signed-off-by: Giovanni Cabiddu <[email protected]> Reviewed-by: Ahsan Atta <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - fix seq_file position update in adf_ring_next()Giovanni Cabiddu2025-07-271-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The `adf_ring_next()` function in the QAT debug transport interface fails to correctly update the position index when reaching the end of the ring elements. This triggers the following kernel warning when reading ring files, such as /sys/kernel/debug/qat_c6xx_<D:B:D:F>/transport/bank_00/ring_00: [27725.022965] seq_file: buggy .next function adf_ring_next [intel_qat] did not update position index Ensure that the `*pos` index is incremented before returning NULL when after the last element in the ring is found, satisfying the seq_file API requirements and preventing the warning. Fixes: a672a9dc872e ("crypto: qat - Intel(R) QAT transport code") Signed-off-by: Giovanni Cabiddu <[email protected]> Reviewed-by: Ahsan Atta <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - fix DMA direction for compression on GEN2 devicesGiovanni Cabiddu2025-07-272-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QAT devices perform an additional integrity check during compression by decompressing the output. Starting from QAT GEN4, this verification is done in-line by the hardware. However, on GEN2 devices, the hardware reads back the compressed output from the destination buffer and performs a decompression operation using it as the source. In the current QAT driver, destination buffers are always marked as write-only. This is incorrect for QAT GEN2 compression, where the buffer is also read during verification. Since commit 6f5dc7658094 ("iommu/vt-d: Restore WO permissions on second-level paging entries"), merged in v6.16-rc1, write-only permissions are strictly enforced, leading to DMAR errors when using QAT GEN2 devices for compression, if VT-d is enabled. Mark the destination buffers as DMA_BIDIRECTIONAL. This ensures compatibility with GEN2 devices, even though it is not required for QAT GEN4 and later. Signed-off-by: Giovanni Cabiddu <[email protected]> Fixes: cf5bb835b7c8 ("crypto: qat - fix DMA transfer direction") Reviewed-by: Ahsan Atta <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: engine - remove request batching supportOvidiu Panait2025-07-182-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove request batching support from crypto_engine, as there are no drivers using this feature and it doesn't really work that well. Instead of doing batching based on backlog, a more optimal approach would be for the user to handle the batching (similar to how IPsec can hook into GSO to get 64K of data each time or how block encryption can use unit sizes much greater than 4K). Suggested-by: Herbert Xu <[email protected]> Signed-off-by: Ovidiu Panait <[email protected]> Reviewed-by: Horia Geantă <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - flush misc workqueue during device shutdownGiovanni Cabiddu2025-07-183-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Repeated loading and unloading of a device specific QAT driver, for example qat_4xxx, in a tight loop can lead to a crash due to a use-after-free scenario. This occurs when a power management (PM) interrupt triggers just before the device-specific driver (e.g., qat_4xxx.ko) is unloaded, while the core driver (intel_qat.ko) remains loaded. Since the driver uses a shared workqueue (`qat_misc_wq`) across all devices and owned by intel_qat.ko, a deferred routine from the device-specific driver may still be pending in the queue. If this routine executes after the driver is unloaded, it can dereference freed memory, resulting in a page fault and kernel crash like the following: BUG: unable to handle page fault for address: ffa000002e50a01c #PF: supervisor read access in kernel mode RIP: 0010:pm_bh_handler+0x1d2/0x250 [intel_qat] Call Trace: pm_bh_handler+0x1d2/0x250 [intel_qat] process_one_work+0x171/0x340 worker_thread+0x277/0x3a0 kthread+0xf0/0x120 ret_from_fork+0x2d/0x50 To prevent this, flush the misc workqueue during device shutdown to ensure that all pending work items are completed before the driver is unloaded. Note: This approach may slightly increase shutdown latency if the workqueue contains jobs from other devices, but it ensures correctness and stability. Fixes: e5745f34113b ("crypto: qat - enable power management for QAT GEN4") Signed-off-by: Giovanni Cabiddu <[email protected]> Cc: [email protected] Reviewed-by: Ahsan Atta <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - enable rate limiting feature for GEN6 devicesSuman Kumar Chakraborty2025-07-182-0/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for enabling rate limiting(RL) feature for QAT GEN6 by initializing the rl_data member in adf_hw_device_data structure. Implement init_num_svc_aes() for GEN6 which will populate the number of AEs associated with the RL service type. Implement adf_gen6_get_svc_slice_cnt() for GEN6 which will return the slice count that can support the RL service type. Co-developed-by: George Abraham P <[email protected]> Signed-off-by: George Abraham P <[email protected]> Signed-off-by: Suman Kumar Chakraborty <[email protected]> Reviewed-by: Giovanni Cabiddu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - add compression slice count for rate limitingSuman Kumar Chakraborty2025-07-182-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In QAT GEN4 devices, the compression slice count was tracked using the dcpr_cnt field. Introduce a new cpr_cnt field in the rate limiting (RL) infrastructure to track the compression (CPR) slice count independently. The cpr_cnt value is populated via the RL_INIT admin message. The existing dcpr_cnt field will now be used exclusively to cache the decompression slice count, ensuring a clear separation between compression and decompression tracking. Signed-off-by: Suman Kumar Chakraborty <[email protected]> Reviewed-by: Giovanni Cabiddu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - add get_svc_slice_cnt() in device data structureSuman Kumar Chakraborty2025-07-186-14/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enhance the adf_hw_device_data structure by introducing a new callback function get_svc_slice_cnt(), which provides a mechanism to query the total number of accelerator available on the device for a specific service. Implement adf_gen4_get_svc_slice_cnt() for QAT GEN4 devices to support this new interface. This function returns the total accelerator count for a specific service. Co-developed-by: George Abraham P <[email protected]> Signed-off-by: George Abraham P <[email protected]> Signed-off-by: Suman Kumar Chakraborty <[email protected]> Reviewed-by: Giovanni Cabiddu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - add adf_rl_get_num_svc_aes() in rate limitingSuman Kumar Chakraborty2025-07-186-1/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Enhance the rate limiting (RL) infrastructure by adding adf_rl_get_num_svc_aes() which can be used to fetch the number of engines associated with the service type. Expand the structure adf_rl_hw_data with an array that contains the number of AEs per service. Implement adf_gen4_init_num_svc_aes() for QAT GEN4 devices to calculate the total number of acceleration engines dedicated to a specific service. Signed-off-by: Suman Kumar Chakraborty <[email protected]> Reviewed-by: Giovanni Cabiddu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - relocate service related functionsSuman Kumar Chakraborty2025-07-185-36/+38
| | | | | | | | | | | | | | | | | | | | | | | | Rename (1) is_service_enabled() to adf_is_service_enabled(), and (2) srv_to_cfg_svc_type() to adf_srv_to_cfg_svc_type(), and move them to adf_cfg_services.c which is the appropriate place for configuration-related service logic. This improves code organization and modularity by grouping related service configuration logic in a single location. Signed-off-by: Suman Kumar Chakraborty <[email protected]> Reviewed-by: Giovanni Cabiddu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - consolidate service enumsSuman Kumar Chakraborty2025-07-189-50/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The enums `adf_base_services` (used in rate limiting) and `adf_services` define the same values, resulting in code duplication. To improve consistency across the QAT driver: (1) rename `adf_services` to `adf_base_services` in adf_cfg_services.c to better reflect its role in defining core services (those with dedicated accelerators), (2) introduce a new `adf_extended_services` enum starting from `SVC_BASE_COUNT`, and move `SVC_DCC` into it, as it represents an extended service (DC with chaining), and (3) remove the redundant `adf_base_services` enum from the rate limiting implementation. This does not introduce any functional change. Signed-off-by: Suman Kumar Chakraborty <[email protected]> Reviewed-by: Giovanni Cabiddu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - add decompression service for rate limitingSuman Kumar Chakraborty2025-07-183-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new base service type ADF_SVC_DECOMP to the QAT rate limiting (RL) infrastructure. This enables RL support for the decompression (DECOMP) service type, allowing service-level agreements (SLAs) to be enforced when decompression is configured. The new service is exposed in the sysfs RL service list for visibility. Note that this support is applicable only to devices that provide the decompression service, such as QAT GEN6 devices. Signed-off-by: Suman Kumar Chakraborty <[email protected]> Reviewed-by: Giovanni Cabiddu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - validate service in rate limiting sysfs apiSuman Kumar Chakraborty2025-07-183-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | The sysfs interface 'qat_rl/srv' currently allows all valid services, even if a service is not configured for the device. This leads to a failure when attempting to add the SLA using 'qat_rl/sla_op'. Add a check using is_service_enabled() to ensure the requested service is enabled. If not, return -EINVAL to prevent invalid configurations. Signed-off-by: Suman Kumar Chakraborty <[email protected]> Reviewed-by: Giovanni Cabiddu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: hisilicon/sec2 - implement full backlog mode for secWenkai Lin2025-07-182-180/+457
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces a hierarchical backlog mechanism to cache user data in high-throughput encryption/decryption scenarios, the implementation addresses packet loss issues when hardware queues overflow during peak loads. First, we use sec_alloc_req_id to obtain an exclusive resource from the pre-allocated resource pool of each queue, if no resource is allocated, perform the DMA map operation on the request memory. When the task is ready, we will attempt to send it to the hardware, if the hardware queue is already full, we cache the request into the backlog list, then return an EBUSY status to the upper layer and instruct the packet-sending thread to pause transmission. Simultaneously, when the hardware completes a task, it triggers the sec callback function, within this function, reattempt to send the requests from the backlog list and wake up the sending thread until the hardware queue becomes fully occupied again. In addition, it handles such exceptions like the hardware is reset when packets are sent, it will switch to the software computing and release occupied resources. Signed-off-by: Wenkai Lin <[email protected]> Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - enable telemetry for GEN6 devicesVijay Sundar Selvamani2025-07-184-0/+348
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable telemetry for QAT GEN6 devices by defining the firmware data structures layouts, implementing the counters parsing logic and setting the required properties on the adf_tl_hw_data data structure. As for QAT GEN4, telemetry counters are exposed via debugfs using the interface described in Documentation/ABI/testing/debugfs-driver-qat_telemetry. Co-developed-by: George Abraham P <[email protected]> Signed-off-by: George Abraham P <[email protected]> Signed-off-by: Vijay Sundar Selvamani <[email protected]> Signed-off-by: Suman Kumar Chakraborty <[email protected]> Reviewed-by: Giovanni Cabiddu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - add decompression service to telemetryVijay Sundar Selvamani2025-07-181-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | QAT GEN6 devices offer decompression as an additional service. Update the telemetry ring pair service interface to support monitoring decompression operations. Co-developed-by: George Abraham P <[email protected]> Signed-off-by: George Abraham P <[email protected]> Signed-off-by: Vijay Sundar Selvamani <[email protected]> Signed-off-by: Suman Kumar Chakraborty <[email protected]> Reviewed-by: Giovanni Cabiddu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - enable power management debugfs for GEN6 devicesGeorge Abraham P2025-07-184-1/+159
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The QAT driver includes infrastructure to report power management (PM) information via debugfs. Extend this support to QAT GEN6 devices by exposing PM debug data through the `pm_status` file. This implementation reports the current PM state, power management hardware control and status registers (CSR), and per-domain power status specific to the QAT GEN6 architecture. The debug functionality is implemented in adf_gen6_pm_dbgfs.c and initialized as part of the enable_pm() function. Co-developed-by: Vijay Sundar Selvamani <[email protected]> Signed-off-by: Vijay Sundar Selvamani <[email protected]> Signed-off-by: George Abraham P <[email protected]> Signed-off-by: Suman Kumar Chakraborty <[email protected]> Reviewed-by: Giovanni Cabiddu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - relocate power management debugfs helper APIsGeorge Abraham P2025-07-184-86/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Relocate the power management debugfs helper APIs in a common file adf_pm_dbgfs_utils.h and adf_pm_dbgfs_utils.c so that it can be shared between device generations. When moving logic from adf_gen4_pm_debugfs.c to adf_pm_dbgfs_utils.c, the include kernel.h has been replaced with the required include. This does not introduce any functional change. Signed-off-by: George Abraham P <[email protected]> Signed-off-by: Suman Kumar Chakraborty <[email protected]> Reviewed-by: Giovanni Cabiddu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - fix virtual channel configuration for GEN6 devicesSuman Kumar Chakraborty2025-07-182-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The TCVCMAP (Traffic Class to Virtual Channel Mapping) field in the PVC0CTL and PVC1CTL register controls how traffic classes are mapped to virtual channels in QAT GEN6 hardware. The driver previously wrote a default TCVCMAP value to this register, but this configuration was incorrect. Modify the TCVCMAP configuration to explicitly enable both VC0 and VC1, and map Traffic Classes 0 to 7 → VC0 and Traffic Class 8 → VC1. Replace FIELD_PREP() with FIELD_MODIFY() to ensure that only the intended TCVCMAP field is updated, preserving other bits in the register. This prevents unintended overwrites of unrelated configuration fields when modifying TC to VC mappings. Fixes: 17fd7514ae68 ("crypto: qat - add qat_6xxx driver") Signed-off-by: Suman Kumar Chakraborty <[email protected]> Reviewed-by: Giovanni Cabiddu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: drivers - Remove redundant pm_runtime_mark_last_busy() callsSakari Ailus2025-07-188-8/+0
| | | | | | | | | | | | | | | | | | | | pm_runtime_put_autosuspend(), pm_runtime_put_sync_autosuspend(), pm_runtime_autosuspend() and pm_request_autosuspend() now include a call to pm_runtime_mark_last_busy(). Remove the now-reduntant explicit call to pm_runtime_mark_last_busy(). Signed-off-by: Sakari Ailus <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: caam - avoid option aliasing with the CONFIG_CAAM_QI build optionLukas Bulwahn2025-07-185-11/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the Makefile, the new build option CONFIG_CAAM_QI is defined conditioned on the existence of the CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI, which is properly defined in the Kconfig file. So, CONFIG_CAAM_QI is just a local alias for CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI. There is little benefit in the source code of having this slightly shorter alias for this configuration, but it complicates further maintenance, as searching for the impact of CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI requires to grep once, and then identify the option introduced and continue searching for that. Further, tools, such as cross referencers, and scripts to check Kconfig definitions and their use simply do not handle this situation. Given that this is the only incidence of such a config alias in the whole kernel tree, just prefer to avoid this pattern of aliasing here. Use CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI throughout the Freescale CAAM-Multicore platform driver backend source code. No functional change. Signed-off-by: Lukas Bulwahn <[email protected]> Reviewed-by: Horia Geantă <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - add live migration enablers for GEN6 devicesMałgorzata Mielnik2025-07-183-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation of the QAT live migration enablers is exclusive to QAT GEN4 devices and resides within QAT GEN4 specific files. However, the underlying mechanisms, such as the relevant CSRs and offsets, can be shared between QAT GEN4 and QAT GEN6 devices. Add the necessary enablers required to implement live migration for QAT GEN6 devices to the abstraction layer to allow leveraging the existing QAT GEN4 implementation. Signed-off-by: Małgorzata Mielnik <[email protected]> Reviewed-by: Giovanni Cabiddu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - relocate and rename bank state structure definitionSuman Kumar Chakraborty2025-07-184-45/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The `bank_state` structure represents the state of a bank of rings. As part of recent refactoring, the functions that interact with this structure have been moved to a new unit, adf_bank_state.c. To align with this reorganization, rename `struct bank_state` to `struct adf_bank_state` and move its definition to adf_bank_state.h. Also relocate the associated `struct ring_config` to the same header to consolidate related definitions. Update all references to use the new structure name. This does not introduce any functional change. Signed-off-by: Suman Kumar Chakraborty <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - relocate bank state helper functionsMałgorzata Mielnik2025-07-186-209/+258
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The existing implementation of bank state management functions, including saving and restoring state, is located within 4xxx device files. However, these functions do not contain GEN4-specific code and are applicable to other QAT generations. Relocate the bank state management functions to a new file, adf_bank_state.c, and rename them removing the `gen4` prefix. This change enables the reuse of such functions across different QAT generations. Add documentation to bank state related functions that were moved from QAT 4xxx specific files to common files. This does not introduce any functional change. Signed-off-by: Małgorzata Mielnik <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - replace CHECK_STAT macro with static inline functionSuman Kumar Chakraborty2025-07-181-14/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | The macro CHECK_STAT is used to check that all ring statuses match the saved state during restoring the state of bank. Replace the CHECK_STAT macro with the static inline function `check_stat()` to improve type safety, readability, and debuggability. This does not introduce any functional change. Signed-off-by: Suman Kumar Chakraborty <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - use pr_fmt() in adf_gen4_hw_data.cSuman Kumar Chakraborty2025-07-181-4/+6
| | | | | | | | | | | | | | | | | | | | Add pr_fmt() to adf_gen4_hw_data.c logging and update the debug and error messages to utilize it accordingly. This does not introduce any functional changes. Signed-off-by: Suman Kumar Chakraborty <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - disable ZUC-256 capability for QAT GEN5Bairavi Alagappan2025-07-181-8/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ZUC-256 EEA (encryption) and EIA (integrity) algorithms are not supported on QAT GEN5 devices, as their current implementation does not align with the NIST specification. Earlier versions of the ZUC-256 specification used a different initialization scheme, which has since been revised to comply with the 5G specification. Due to this misalignment with the updated specification, remove support for ZUC-256 EEA and EIA for QAT GEN5 by masking out the ZUC-256 capability. Fixes: fcf60f4bcf549 ("crypto: qat - add support for 420xx devices") Signed-off-by: Bairavi Alagappan <[email protected]> Signed-off-by: Giovanni Cabiddu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: img-hash - Fix dma_unmap_sg() nents valueThomas Fourier2025-07-181-1/+1
| | | | | | | | | | | | | | | | | | The dma_unmap_sg() functions should be called with the same nents as the dma_map_sg(), not the value the map function returned. Fixes: d358f1abbf71 ("crypto: img-hash - Add Imagination Technologies hw hash accelerator") Signed-off-by: Thomas Fourier <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: keembay - Fix dma_unmap_sg() nents valueThomas Fourier2025-07-181-1/+7
| | | | | | | | | | | | | | | | | | The dma_unmap_sg() functions should be called with the same nents as the dma_map_sg(), not the value the map function returned. Fixes: 472b04444cd3 ("crypto: keembay - Add Keem Bay OCS HCU driver") Signed-off-by: Thomas Fourier <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: ccp - Fix crash when rebind ccp device for ccp.koMengbiao Xiong2025-07-071-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When CONFIG_CRYPTO_DEV_CCP_DEBUGFS is enabled, rebinding the ccp device causes the following crash: $ echo '0000:0a:00.2' > /sys/bus/pci/drivers/ccp/unbind $ echo '0000:0a:00.2' > /sys/bus/pci/drivers/ccp/bind [ 204.976930] BUG: kernel NULL pointer dereference, address: 0000000000000098 [ 204.978026] #PF: supervisor write access in kernel mode [ 204.979126] #PF: error_code(0x0002) - not-present page [ 204.980226] PGD 0 P4D 0 [ 204.981317] Oops: Oops: 0002 [#1] SMP NOPTI ... [ 204.997852] Call Trace: [ 204.999074] <TASK> [ 205.000297] start_creating+0x9f/0x1c0 [ 205.001533] debugfs_create_dir+0x1f/0x170 [ 205.002769] ? srso_return_thunk+0x5/0x5f [ 205.004000] ccp5_debugfs_setup+0x87/0x170 [ccp] [ 205.005241] ccp5_init+0x8b2/0x960 [ccp] [ 205.006469] ccp_dev_init+0xd4/0x150 [ccp] [ 205.007709] sp_init+0x5f/0x80 [ccp] [ 205.008942] sp_pci_probe+0x283/0x2e0 [ccp] [ 205.010165] ? srso_return_thunk+0x5/0x5f [ 205.011376] local_pci_probe+0x4f/0xb0 [ 205.012584] pci_device_probe+0xdb/0x230 [ 205.013810] really_probe+0xed/0x380 [ 205.015024] __driver_probe_device+0x7e/0x160 [ 205.016240] device_driver_attach+0x2f/0x60 [ 205.017457] bind_store+0x7c/0xb0 [ 205.018663] drv_attr_store+0x28/0x40 [ 205.019868] sysfs_kf_write+0x5f/0x70 [ 205.021065] kernfs_fop_write_iter+0x145/0x1d0 [ 205.022267] vfs_write+0x308/0x440 [ 205.023453] ksys_write+0x6d/0xe0 [ 205.024616] __x64_sys_write+0x1e/0x30 [ 205.025778] x64_sys_call+0x16ba/0x2150 [ 205.026942] do_syscall_64+0x56/0x1e0 [ 205.028108] entry_SYSCALL_64_after_hwframe+0x76/0x7e [ 205.029276] RIP: 0033:0x7fbc36f10104 [ 205.030420] Code: 89 02 48 c7 c0 ff ff ff ff c3 66 2e 0f 1f 84 00 00 00 00 00 66 90 48 8d 05 e1 08 2e 00 8b 00 85 c0 75 13 b8 01 00 00 00 0f 05 <48> 3d 00 f0 ff ff 77 54 f3 c3 66 90 41 54 55 49 89 d4 53 48 89 f5 This patch sets ccp_debugfs_dir to NULL after destroying it in ccp5_debugfs_destroy, allowing the directory dentry to be recreated when rebinding the ccp device. Tested on AMD Ryzen 7 1700X. Fixes: 3cdbe346ed3f ("crypto: ccp - Add debugfs entries for CCP information") Signed-off-by: Mengbiao Xiong <[email protected]> Reviewed-by: Tom Lendacky <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: inside-secure - Fix `dma_unmap_sg()` nents valueThomas Fourier2025-07-071-2/+6
| | | | | | | | | | | | | | | | | | | | The `dma_unmap_sg()` functions should be called with the same nents as the `dma_map_sg()`, not the value the map function returned. Fixes: c957f8b3e2e5 ("crypto: inside-secure - avoid unmapping DMA memory that was not mapped") Signed-off-by: Thomas Fourier <[email protected]> Reviewed-by: Antoine Tenart <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: ccp - Fix locking on alloc failure handlingAlexey Kardashevskiy2025-07-071-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The __snp_alloc_firmware_pages() helper allocates pages in the firmware state (alloc + rmpupdate). In case of failed rmpupdate, it tries reclaiming pages with already changed state. This requires calling the PSP firmware and since there is sev_cmd_mutex to guard such calls, the helper takes a "locked" parameter so specify if the lock needs to be held. Most calls happen from snp_alloc_firmware_page() which executes without the lock. However commit 24512afa4336 ("crypto: ccp: Handle the legacy TMR allocation when SNP is enabled") switched sev_fw_alloc() from alloc_pages() (which does not call the PSP) to __snp_alloc_firmware_pages() (which does) but did not account for the fact that sev_fw_alloc() is called from __sev_platform_init_locked() (via __sev_platform_init_handle_tmr()) and executes with the lock held. Add a "locked" parameter to __snp_alloc_firmware_pages(). Make sev_fw_alloc() use the new parameter to prevent potential deadlock in rmp_mark_pages_firmware() if rmpupdate() failed. Fixes: 24512afa4336 ("crypto: ccp: Handle the legacy TMR allocation when SNP is enabled") Signed-off-by: Alexey Kardashevskiy <[email protected]> Reviewed-by: Tom Lendacky <[email protected]> Reviewed-by: Pratik R. Sampat <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: s390 - New s390 specific protected key hash phmacHarald Freudenberger2025-06-261-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for protected key hmac ("phmac") for s390 arch. With the latest machine generation there is now support for protected key (that is a key wrapped by a master key stored in firmware) hmac for sha2 (sha224, sha256, sha384 and sha512) for the s390 specific CPACF instruction kmac. This patch adds support via 4 new ahashes registered as phmac(sha224), phmac(sha256), phmac(sha384) and phmac(sha512). Co-developed-by: Holger Dengler <[email protected]> Signed-off-by: Harald Freudenberger <[email protected]> Reviewed-by: Holger Dengler <[email protected]> Signed-off-by: Holger Dengler <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: aspeed - Fix hash fallback path typoHerbert Xu2025-06-261-1/+1
| | | | | | | | | | | | | | | | Fix typo in the fallback code path. Reported-by: kernel test robot <[email protected]> Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/ Signed-off-by: Herbert Xu <[email protected]>
| * crypto: hisilicon - Use fine grained DMA mapping directionZenghui Yu2025-06-233-21/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following splat was triggered when booting the kernel built with arm64's defconfig + CRYPTO_SELFTESTS + DMA_API_DEBUG. ------------[ cut here ]------------ DMA-API: hisi_sec2 0000:75:00.0: cacheline tracking EEXIST, overlapping mappings aren't supported WARNING: CPU: 24 PID: 1273 at kernel/dma/debug.c:596 add_dma_entry+0x248/0x308 Call trace: add_dma_entry+0x248/0x308 (P) debug_dma_map_sg+0x208/0x3e4 __dma_map_sg_attrs+0xbc/0x118 dma_map_sg_attrs+0x10/0x24 hisi_acc_sg_buf_map_to_hw_sgl+0x80/0x218 [hisi_qm] sec_cipher_map+0xc4/0x338 [hisi_sec2] sec_aead_sgl_map+0x18/0x24 [hisi_sec2] sec_process+0xb8/0x36c [hisi_sec2] sec_aead_crypto+0xe4/0x264 [hisi_sec2] sec_aead_encrypt+0x14/0x20 [hisi_sec2] crypto_aead_encrypt+0x24/0x38 test_aead_vec_cfg+0x480/0x7e4 test_aead_vec+0x84/0x1b8 alg_test_aead+0xc0/0x498 alg_test.part.0+0x518/0x524 alg_test+0x20/0x64 cryptomgr_test+0x24/0x44 kthread+0x130/0x1fc ret_from_fork+0x10/0x20 ---[ end trace 0000000000000000 ]--- DMA-API: Mapped at: debug_dma_map_sg+0x234/0x3e4 __dma_map_sg_attrs+0xbc/0x118 dma_map_sg_attrs+0x10/0x24 hisi_acc_sg_buf_map_to_hw_sgl+0x80/0x218 [hisi_qm] sec_cipher_map+0xc4/0x338 [hisi_sec2] This occurs in selftests where the input and the output scatterlist point to the same underlying memory (e.g., when tested with INPLACE_TWO_SGLISTS mode). The problem is that the hisi_sec2 driver maps these two different scatterlists using the DMA_BIDIRECTIONAL flag which leads to overlapped write mappings which are not supported by the DMA layer. Fix it by using the fine grained and correct DMA mapping directions. While at it, switch the DMA directions used by the hisi_zip driver too. Signed-off-by: Zenghui Yu <[email protected]> Reviewed-by: Longfang Liu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: ccree - Don't use %pK through printkThomas Weißschuh2025-06-233-44/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the past %pK was preferable to %p as it would not leak raw pointer values into the kernel log. Since commit ad67b74d2469 ("printk: hash addresses printed with %p") the regular %p has been improved to avoid this issue. Furthermore, restricted pointers ("%pK") were never meant to be used through printk(). They can still unintentionally leak raw pointers or acquire sleeping locks in atomic contexts. Switch to the regular pointer formatting which is safer and easier to reason about. Signed-off-by: Thomas Weißschuh <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - restore ASYM service support for GEN6 devicesSuman Kumar Chakraborty2025-06-231-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Support for asymmetric crypto services was not included in the qat_6xxx by explicitly setting the asymmetric capabilities to 0 to allow for additional testing. Enable asymmetric crypto services on QAT GEN6 devices by setting the appropriate capability flags. Fixes: 17fd7514ae68 ("crypto: qat - add qat_6xxx driver") Signed-off-by: Suman Kumar Chakraborty <[email protected]> Reviewed-by: Giovanni Cabiddu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - remove duplicate masking for GEN6 devicesSuman Kumar Chakraborty2025-06-231-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | The ICP_ACCEL_CAPABILITIES_CIPHER capability is masked out redundantly for QAT GEN6 devices. Remove it to avoid code duplication. This does not introduce any functional change. Signed-off-by: Suman Kumar Chakraborty <[email protected]> Reviewed-by: Giovanni Cabiddu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: ccp - Fix SNP panic notifier unregistrationAshish Kalra2025-06-231-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Panic notifiers are invoked with RCU read lock held and when the SNP panic notifier tries to unregister itself from the panic notifier callback itself it causes a deadlock as notifier unregistration does RCU synchronization. Code flow for SNP panic notifier: snp_shutdown_on_panic() -> __sev_firmware_shutdown() -> __sev_snp_shutdown_locked() -> atomic_notifier_chain_unregister(.., &snp_panic_notifier) Fix SNP panic notifier to unregister itself during SNP shutdown only if panic is not in progress. Reviewed-by: Tom Lendacky <[email protected]> Cc: [email protected] Fixes: 19860c3274fb ("crypto: ccp - Register SNP panic notifier only if SNP is enabled") Signed-off-by: Ashish Kalra <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: virtio - Remove unused virtcrypto functionsDr. David Alan Gilbert2025-06-232-38/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | virtcrypto_devmgr_get_first() and virtcrypto_dev_in_use() were added in 2016 by commit dbaf0624ffa5 ("crypto: add virtio-crypto driver") but have remained unused. Remove them. Signed-off-by: Dr. David Alan Gilbert <[email protected]> Reviewed-by: Zenghui Yu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: qat - lower priority for skcipher and aead algorithmsGiovanni Cabiddu2025-06-231-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Most kernel applications utilizing the crypto API operate synchronously and on small buffer sizes, therefore do not benefit from QAT acceleration. Reduce the priority of QAT implementations for both skcipher and aead algorithms, allowing more suitable alternatives to be selected by default. Signed-off-by: Giovanni Cabiddu <[email protected]> Link: https://lore.kernel.org/all/[email protected]/ Cc: [email protected] Acked-by: Eric Biggers <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: atmel - add support for AES and SHA IPs available on sama7d65 SoCRyan Wanner2025-06-232-0/+2
| | | | | | | | | | | | | | | | This patch adds support for hardware version of AES and SHA IPs available on SAMA7D65 SoC. Signed-off-by: Ryan Wanner <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: caam - Support iMX8QXP and variants thereofJohn Ernberg2025-06-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The iMX8QXP (and variants such as the QX, DX, DXP) all identify as iMX8QXP. They have the exact same restrictions as the supported iMX8QM introduced at commit 61bb8db6f682 ("crypto: caam - Add support for i.MX8QM") Loosen the check a little bit with a wildcard to also match the iMX8QXP and its variants. Signed-off-by: John Ernberg <[email protected]> Reviewed-by: Frank Li <[email protected]> Reviewed-by: Peng Fan <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
| * crypto: caam - Prevent crash on suspend with iMX8QM / iMX8ULPJohn Ernberg2025-06-232-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the CAAM on these SoCs is managed by another ARM core, called the SECO (Security Controller) on iMX8QM and Secure Enclave on iMX8ULP, which also reserves access to register page 0 suspend operations cannot touch this page. This is similar to when running OPTEE, where OPTEE will reserve page 0. Track this situation using a new state variable no_page0, reflecting if page 0 is reserved elsewhere, either by other management cores in SoC or by OPTEE. Replace the optee_en check in suspend/resume with the new check. optee_en cannot go away as it's needed elsewhere to gate OPTEE specific situations. Fixes the following splat at suspend: Internal error: synchronous external abort: 0000000096000010 [#1] SMP Hardware name: Freescale i.MX8QXP ACU6C (DT) pstate: 60400005 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--) pc : readl+0x0/0x18 lr : rd_reg32+0x18/0x3c sp : ffffffc08192ba20 x29: ffffffc08192ba20 x28: ffffff8025190000 x27: 0000000000000000 x26: ffffffc0808ae808 x25: ffffffc080922338 x24: ffffff8020e89090 x23: 0000000000000000 x22: ffffffc080922000 x21: ffffff8020e89010 x20: ffffffc080387ef8 x19: ffffff8020e89010 x18: 000000005d8000d5 x17: 0000000030f35963 x16: 000000008f785f3f x15: 000000003b8ef57c x14: 00000000c418aef8 x13: 00000000f5fea526 x12: 0000000000000001 x11: 0000000000000002 x10: 0000000000000001 x9 : 0000000000000000 x8 : ffffff8025190870 x7 : ffffff8021726880 x6 : 0000000000000002 x5 : ffffff80217268f0 x4 : ffffff8021726880 x3 : ffffffc081200000 x2 : 0000000000000001 x1 : ffffff8020e89010 x0 : ffffffc081200004 Call trace: readl+0x0/0x18 caam_ctrl_suspend+0x30/0xdc dpm_run_callback.constprop.0+0x24/0x5c device_suspend+0x170/0x2e8 dpm_suspend+0xa0/0x104 dpm_suspend_start+0x48/0x50 suspend_devices_and_enter+0x7c/0x45c pm_suspend+0x148/0x160 state_store+0xb4/0xf8 kobj_attr_store+0x14/0x24 sysfs_kf_write+0x38/0x48 kernfs_fop_write_iter+0xb4/0x178 vfs_write+0x118/0x178 ksys_write+0x6c/0xd0 __arm64_sys_write+0x14/0x1c invoke_syscall.constprop.0+0x64/0xb0 do_el0_svc+0x90/0xb0 el0_svc+0x18/0x44 el0t_64_sync_handler+0x88/0x124 el0t_64_sync+0x150/0x154 Code: 88dffc21 88dffc21 5ac00800 d65f03c0 (b9400000) Fixes: d2835701d93c ("crypto: caam - i.MX8ULP donot have CAAM page0 access") Cc: [email protected] # v6.10+ Signed-off-by: John Ernberg <[email protected]> Reviewed-by: Peng Fan <[email protected]> Reviewed-by: Frank Li <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
generated by cgit (git 2.51.2) at 2025-11-30 19:07:52 +0000