diff options
Diffstat (limited to 'drivers/mmc/host')
| -rw-r--r-- | drivers/mmc/host/sdhci-of-dwcmshc.c | 81 |
1 files changed, 17 insertions, 64 deletions
diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c index 250ac6300208..4e256673a098 100644 --- a/drivers/mmc/host/sdhci-of-dwcmshc.c +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c @@ -221,7 +221,6 @@ struct rk35xx_priv { struct dwcmshc_priv { struct clk *bus_clk; - struct clk *sdio_clk; int vendor_specific_area1; /* P_VENDOR_SPECIFIC_AREA1 reg */ int vendor_specific_area2; /* P_VENDOR_SPECIFIC_AREA2 reg */ @@ -290,15 +289,17 @@ static void dwcmshc_adma_write_desc(struct sdhci_host *host, void **desc, sdhci_adma_write_desc(host, desc, addr, len, cmd); } -static void dwcmshc_set_clock(struct sdhci_host *host, unsigned int clock) +static void dwcmshc_reset(struct sdhci_host *host, u8 mask) { - struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); - struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host); - - if (priv->sdio_clk) - clk_set_rate(priv->sdio_clk, clock); + sdhci_reset(host, mask); - sdhci_set_clock(host, clock); + /* The dwcmshc does not comply with the SDHCI specification + * regarding the "Software Reset for CMD line should clear 'Command + * Complete' in the Normal Interrupt Status Register." Clear the bit + * here to compensate for this quirk. + */ + if (mask & SDHCI_RESET_CMD) + sdhci_writel(host, SDHCI_INT_RESPONSE, SDHCI_INT_STATUS); } static unsigned int dwcmshc_get_max_clock(struct sdhci_host *host) @@ -844,15 +845,7 @@ static void th1520_sdhci_reset(struct sdhci_host *host, u8 mask) struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host); u16 ctrl_2; - sdhci_reset(host, mask); - - /* The T-Head 1520 SoC does not comply with the SDHCI specification - * regarding the "Software Reset for CMD line should clear 'Command - * Complete' in the Normal Interrupt Status Register." Clear the bit - * here to compensate for this quirk. - */ - if (mask & SDHCI_RESET_CMD) - sdhci_writel(host, SDHCI_INT_RESPONSE, SDHCI_INT_STATUS); + dwcmshc_reset(host, mask); if (priv->flags & FLAG_IO_FIXED_1V8) { ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); @@ -898,7 +891,7 @@ static void cv18xx_sdhci_reset(struct sdhci_host *host, u8 mask) struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host); u32 val, emmc_caps = MMC_CAP2_NO_SD | MMC_CAP2_NO_SDIO; - sdhci_reset(host, mask); + dwcmshc_reset(host, mask); if ((host->mmc->caps2 & emmc_caps) == emmc_caps) { val = sdhci_readl(host, priv->vendor_specific_area1 + CV18XX_SDHCI_MSHC_CTRL); @@ -970,7 +963,7 @@ static void cv18xx_sdhci_post_tuning(struct sdhci_host *host) val |= SDHCI_INT_DATA_AVAIL; sdhci_writel(host, val, SDHCI_INT_STATUS); - sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); + dwcmshc_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); } static int cv18xx_sdhci_execute_tuning(struct sdhci_host *host, u32 opcode) @@ -1108,12 +1101,11 @@ static int sg2042_init(struct device *dev, struct sdhci_host *host, } static const struct sdhci_ops sdhci_dwcmshc_ops = { - .set_clock = dwcmshc_set_clock, + .set_clock = sdhci_set_clock, .set_bus_width = sdhci_set_bus_width, .set_uhs_signaling = dwcmshc_set_uhs_signaling, .get_max_clock = dwcmshc_get_max_clock, - .get_timeout_clock = sdhci_pltfm_clk_get_timeout_clock, - .reset = sdhci_reset, + .reset = dwcmshc_reset, .adma_write_desc = dwcmshc_adma_write_desc, .irq = dwcmshc_cqe_irq_handler, }; @@ -1185,10 +1177,8 @@ static const struct sdhci_ops sdhci_dwcmshc_sg2042_ops = { static const struct dwcmshc_pltfm_data sdhci_dwcmshc_pdata = { .pdata = { .ops = &sdhci_dwcmshc_ops, - .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN | - SDHCI_QUIRK_BROKEN_CARD_DETECTION, - .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | - SDHCI_QUIRK2_BROKEN_HS200, + .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, }, }; @@ -1203,26 +1193,13 @@ static const struct dwcmshc_pltfm_data sdhci_dwcmshc_bf3_pdata = { }; #endif -static const struct sdhci_pltfm_data sdhci_dwcmshc_rp1_pdata = { - .ops = &sdhci_dwcmshc_ops, - .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN | - SDHCI_QUIRK_BROKEN_CARD_DETECTION, - .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | - SDHCI_QUIRK2_BROKEN_HS200 | - SDHCI_QUIRK2_SPURIOUS_INT_RESP, -}; - static const struct dwcmshc_pltfm_data sdhci_dwcmshc_rk35xx_pdata = { .pdata = { .ops = &sdhci_dwcmshc_rk35xx_ops, .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN | SDHCI_QUIRK_BROKEN_TIMEOUT_VAL, .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | - SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN | - SDHCI_QUIRK2_NO_SDR50 | - SDHCI_QUIRK2_NO_SDR104 | - SDHCI_QUIRK2_NO_SDR25, - + SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN, }, .init = dwcmshc_rk35xx_init, .postinit = dwcmshc_rk35xx_postinit, @@ -1335,10 +1312,6 @@ dsbl_cqe_caps: static const struct of_device_id sdhci_dwcmshc_dt_ids[] = { { - .compatible = "raspberrypi,rp1-dwcmshc", - .data = &sdhci_dwcmshc_rp1_pdata, - }, - { .compatible = "rockchip,rk3588-dwcmshc", .data = &sdhci_dwcmshc_rk35xx_pdata, }, @@ -1430,32 +1403,13 @@ static int dwcmshc_probe(struct platform_device *pdev) priv->bus_clk = devm_clk_get(dev, "bus"); if (!IS_ERR(priv->bus_clk)) clk_prepare_enable(priv->bus_clk); - - pltfm_host->timeout_clk = devm_clk_get(dev, "timeout"); - if (!IS_ERR(pltfm_host->timeout_clk)) - err = clk_prepare_enable(pltfm_host->timeout_clk); - if (err) - goto free_pltfm; - - priv->sdio_clk = devm_clk_get_optional(&pdev->dev, "sdio"); } - pltfm_host->timeout_clk = devm_clk_get(&pdev->dev, "timeout"); - if (IS_ERR(pltfm_host->timeout_clk)) { - err = PTR_ERR(pltfm_host->timeout_clk); - dev_err(&pdev->dev, "failed to get timeout clk: %d\n", err); - goto free_pltfm; - } - err = clk_prepare_enable(pltfm_host->timeout_clk); - if (err) - goto free_pltfm; - err = mmc_of_parse(host->mmc); if (err) goto err_clk; sdhci_get_of_property(pdev); - sdhci_enable_v4_mode(host); priv->vendor_specific_area1 = sdhci_readl(host, DWCMSHC_P_VENDOR_AREA1) & DWCMSHC_AREA1_MASK; @@ -1515,7 +1469,6 @@ err_rpm: pm_runtime_put_noidle(dev); err_clk: clk_disable_unprepare(pltfm_host->clk); - clk_disable_unprepare(pltfm_host->timeout_clk); clk_disable_unprepare(priv->bus_clk); clk_bulk_disable_unprepare(priv->num_other_clks, priv->other_clks); return err; |
