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path: root/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h
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Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h19
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h
index 4a8bd2f4195e..20b3970c0857 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h
@@ -104,6 +104,9 @@ struct dml2_dc_callbacks {
struct dc_state *state,
const struct dc_stream_state *stream);
struct dc_stream_state *(*get_stream_from_id)(const struct dc_state *state, unsigned int id);
+ unsigned int (*get_max_flickerless_instant_vtotal_increase)(
+ struct dc_stream_state *stream,
+ bool is_gaming);
};
struct dml2_dc_svp_callbacks {
@@ -192,6 +195,14 @@ struct dml2_soc_bbox_overrides {
struct dml2_clks_limit_table clks_table;
};
+enum dml2_force_pstate_methods {
+ dml2_force_pstate_method_auto = 0,
+ dml2_force_pstate_method_vactive,
+ dml2_force_pstate_method_vblank,
+ dml2_force_pstate_method_drr,
+ dml2_force_pstate_method_subvp,
+};
+
struct dml2_configuration_options {
int dcn_pipe_count;
bool use_native_pstate_optimization;
@@ -215,9 +226,17 @@ struct dml2_configuration_options {
struct dml2_soc_bbox_overrides bbox_overrides;
unsigned int max_segments_per_hubp;
unsigned int det_segment_size;
+ /* Only for debugging purposes when initializing SOCBB params via tool for DML21. */
+ struct socbb_ip_params_external *external_socbb_ip_params;
+ struct {
+ bool force_pstate_method_enable;
+ enum dml2_force_pstate_methods force_pstate_method_value;
+ } pmo;
bool map_dc_pipes_with_callbacks;
bool use_clock_dc_limits;
+ bool gpuvm_enable;
+ struct dml2_soc_bb *bb_from_dmub;
};
/*