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-rw-r--r--arch/arm64/boot/dts/broadcom/Makefile3
-rw-r--r--arch/arm64/boot/dts/broadcom/bcm2712-ds.dtsi499
-rw-r--r--arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts254
-rw-r--r--arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts759
-rw-r--r--arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi477
-rw-r--r--arch/arm64/boot/dts/broadcom/bcm2712.dtsi20
-rw-r--r--arch/arm64/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts107
-rw-r--r--arch/arm64/boot/dts/broadcom/rp1.dtsi1323
8 files changed, 3154 insertions, 288 deletions
diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile
index 83d45afc6588..4f4bc961e2b7 100644
--- a/arch/arm64/boot/dts/broadcom/Makefile
+++ b/arch/arm64/boot/dts/broadcom/Makefile
@@ -7,7 +7,6 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb \
bcm2711-rpi-4-b.dtb \
bcm2711-rpi-cm4-io.dtb \
bcm2712-rpi-5-b.dtb \
- bcm2712-rpi-5-b-ovl-rp1.dtb \
bcm2712-d-rpi-5-b.dtb \
bcm2837-rpi-2-b.dtb \
bcm2837-rpi-3-a-plus.dtb \
@@ -17,6 +16,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb \
bcm2837-rpi-zero-2-w.dtb \
rp1.dtbo
+dtb-$(CONFIG_ARCH_BCM2835) += bcm2712d0-rpi-5-b.dtb
+
subdir-y += bcmbca
subdir-y += northstar2
subdir-y += stingray
diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-ds.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712-ds.dtsi
new file mode 100644
index 000000000000..2b6ddc6f51b9
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-ds.dtsi
@@ -0,0 +1,499 @@
+// SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/soc/bcm2835-pm.h>
+
+#include "bcm2712.dtsi"
+
+/ {
+#ifndef FIRMWARE_UPDATED
+ #size-cells = <1>;
+
+ reserved-memory {
+ ranges;
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ atf@0 {
+ reg = <0x0 0x0 0x80000>;
+ };
+
+ linux,cma {
+ size = <0x4000000>; /* 64MB */
+ alloc-ranges = <0x0 0x00000000 0x40000000>;
+ };
+ };
+#endif
+
+ arm-pmu {
+ compatible = "arm,cortex-a76-pmu";
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+ };
+
+ clocks: clocks {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ clk_usb: clk-usb {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-output-names = "otg";
+ clock-frequency = <480000000>;
+ };
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <1000>;
+ coefficients = <(-550) 450000>;
+ thermal-sensors = <&thermal>;
+
+ thermal_trips: trips {
+ cpu_crit: cpu-crit {
+ temperature = <110000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling_maps: cooling-maps {
+ };
+ };
+ };
+
+ firmwarekms: firmwarekms {
+ compatible = "raspberrypi,rpi-firmware-kms-2712";
+ interrupt-parent = <&cpu_l2_irq>;
+ interrupts = <19>;
+ brcm,firmware = <&firmware>;
+ status = "disabled";
+ };
+
+ usbphy: phy {
+ compatible = "usb-nop-xceiv";
+ #phy-cells = <0>;
+ };
+};
+
+&soc {
+ system_timer: timer@7c003000 {
+ compatible = "brcm,bcm2835-system-timer";
+ reg = <0x7c003000 0x1000>;
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+ clock-frequency = <1000000>;
+ };
+
+ axiperf: axiperf@7c012800 {
+ compatible = "brcm,bcm2712-axiperf";
+ reg = <0x7c012800 0x100>,
+ <0x7e000000 0x100>;
+ firmware = <&firmware>;
+ status = "disabled";
+ };
+
+ spi10: spi@7d004000 {
+ compatible = "brcm,bcm2835-spi";
+ reg = <0x7d004000 0x200>;
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk_vpu>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c10: i2c@7d005600 {
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+ reg = <0x7d005600 0x20>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk_vpu>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ pm: watchdog@7d200000 {
+ compatible = "brcm,bcm2712-pm";
+ reg = <0x7d200000 0x308>;
+ reg-names = "pm";
+ #power-domain-cells = <1>;
+ #reset-cells = <1>;
+ system-power-controller;
+ };
+
+ random: rng@7d208000 {
+ compatible = "brcm,bcm2711-rng200";
+ reg = <0x7d208000 0x28>;
+ status = "okay";
+ };
+
+ cpu_l2_irq: intc@7d503000 {
+ compatible = "brcm,l2-intc";
+ reg = <0x7d503000 0x18>;
+ interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ pinctrl: pinctrl@7d504100 {
+ compatible = "brcm,bcm2712-pinctrl";
+ reg = <0x7d504100 0x30>;
+
+ uarta_24_pins: uarta_24_pins {
+ pin_rts {
+ function = "uart0";
+ pins = "gpio24";
+ bias-disable;
+ };
+ pin_cts {
+ function = "uart0";
+ pins = "gpio25";
+ bias-pull-up;
+ };
+ pin_txd {
+ function = "uart0";
+ pins = "gpio26";
+ bias-disable;
+ };
+ pin_rxd {
+ function = "uart0";
+ pins = "gpio27";
+ bias-pull-up;
+ };
+ };
+
+ sdio2_30_pins: sdio2_30_pins {
+ pin_clk {
+ function = "sd2";
+ pins = "gpio30";
+ bias-disable;
+ };
+ pin_cmd {
+ function = "sd2";
+ pins = "gpio31";
+ bias-pull-up;
+ };
+ pins_dat {
+ function = "sd2";
+ pins = "gpio32", "gpio33", "gpio34", "gpio35";
+ bias-pull-up;
+ };
+ };
+ };
+
+ gio: gpio@7d508500 {
+ compatible = "brcm,brcmstb-gpio";
+ reg = <0x7d508500 0x40>;
+ interrupt-parent = <&main_irq>;
+ interrupts = <0>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ brcm,gpio-bank-widths = <32 22>;
+ brcm,gpio-direct;
+ };
+
+ uarta: serial@7d50c000 {
+ compatible = "brcm,bcm7271-uart";
+ reg = <0x7d50c000 0x20>;
+ reg-names = "uart";
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ interrupts = <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>;
+ skip-init;
+ status = "disabled";
+ };
+
+ pinctrl_aon: pinctrl@7d510700 {
+ compatible = "brcm,bcm2712-aon-pinctrl";
+ reg = <0x7d510700 0x20>;
+
+ i2c3_m4_agpio0_pins: i2c3_m4_agpio0_pins {
+ function = "vc_i2c3";
+ pins = "aon_gpio0", "aon_gpio1";
+ bias-pull-up;
+ };
+
+ bsc_m1_agpio13_pins: bsc_m1_agpio13_pins {
+ function = "bsc_m1";
+ pins = "aon_gpio13", "aon_gpio14";
+ bias-pull-up;
+ };
+
+ bsc_pmu_sgpio4_pins: bsc_pmu_sgpio4_pins {
+ function = "avs_pmu_bsc";
+ pins = "aon_sgpio4", "aon_sgpio5";
+ };
+
+ bsc_m2_sgpio4_pins: bsc_m2_sgpio4_pins {
+ function = "bsc_m2";
+ pins = "aon_sgpio4", "aon_sgpio5";
+ };
+
+ pwm_aon_agpio1_pins: pwm_aon_agpio1_pins {
+ function = "aon_pwm";
+ pins = "aon_gpio1", "aon_gpio2";
+ };
+
+ pwm_aon_agpio4_pins: pwm_aon_agpio4_pins {
+ function = "vc_pwm0";
+ pins = "aon_gpio4", "aon_gpio5";
+ };
+
+ pwm_aon_agpio7_pins: pwm_aon_agpio7_pins {
+ function = "aon_pwm";
+ pins = "aon_gpio7", "aon_gpio9";
+ };
+ };
+
+ interrupt-controller@7d517000 {
+ status = "disabled";
+ };
+
+ main_aon_irq: intc@7d517ac0 {
+ compatible = "brcm,bcm7271-l2-intc";
+ reg = <0x7d517ac0 0x10>;
+ interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ avs_monitor: avs-monitor@7d542000 {
+ compatible = "brcm,bcm2711-avs-monitor",
+ "syscon", "simple-mfd";
+ reg = <0x7d542000 0xf00>;
+ status = "okay";
+
+ thermal: thermal {
+ compatible = "brcm,bcm2711-thermal";
+ #thermal-sensor-cells = <0>;
+ };
+ };
+};
+
+&axi {
+ iommu2: iommu@5100 {
+ /* IOMMU2 for PISP-BE, HEVC; and (unused) H264 accelerators */
+ compatible = "brcm,bcm2712-iommu";
+ reg = <0x10 0x5100 0x0 0x80>;
+ cache = <&iommuc>;
+ aperture-size = <0x1 0x00000000>; // Increase IOVA aperture size to 4GBytes
+ #iommu-cells = <0>;
+ };
+
+ iommu4: iommu@5200 {
+ /* IOMMU4 for HVS, MPL/TXP; and (unused) Unicam, PISP-FE, MiniBVN */
+ compatible = "brcm,bcm2712-iommu";
+ reg = <0x10 0x5200 0x0 0x80>;
+ cache = <&iommuc>;
+ #iommu-cells = <0>;
+ #interconnect-cells = <0>;
+ };
+
+ iommu5: iommu@5280 {
+ /* IOMMU5 for PCIe2 (RP1); and (unused) BSTM */
+ compatible = "brcm,bcm2712-iommu";
+ reg = <0x10 0x5280 0x0 0x80>;
+ cache = <&iommuc>;
+ #iommu-cells = <0>;
+ dma-iova-offset = <0x10 0x00000000>; // HACK for RP1 masters over PCIe
+ };
+
+ iommuc: iommuc@5b00 {
+ compatible = "brcm,bcm2712-iommuc";
+ reg = <0x10 0x5b00 0x0 0x80>;
+ };
+
+ dma32: dma@10000 {
+ compatible = "brcm,bcm2712-dma";
+ reg = <0x10 0x00010000 0 0x600>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dma0",
+ "dma1",
+ "dma2",
+ "dma3",
+ "dma4",
+ "dma5";
+ #dma-cells = <1>;
+ brcm,dma-channel-mask = <0x0035>;
+ };
+
+ dma40: dma@10600 {
+ compatible = "brcm,bcm2712-dma";
+ reg = <0x10 0x00010600 0 0x600>;
+ interrupts =
+ <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, /* dma4 6 */
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, /* dma4 7 */
+ <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, /* dma4 8 */
+ <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, /* dma4 9 */
+ <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, /* dma4 10 */
+ <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; /* dma4 11 */
+ interrupt-names = "dma6",
+ "dma7",
+ "dma8",
+ "dma9",
+ "dma10",
+ "dma11";
+ #dma-cells = <1>;
+ brcm,dma-channel-mask = <0x0fc0>;
+ };
+
+ syscon_piarbctl: syscon@400018 {
+ compatible = "brcm,syscon-piarbctl", "syscon", "simple-mfd";
+ reg = <0x10 0x00400018 0x0 0x18>;
+ };
+
+ usb: usb@480000 {
+ compatible = "brcm,bcm2835-usb";
+ reg = <0x10 0x00480000 0x0 0x10000>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk_usb>;
+ clock-names = "otg";
+ phys = <&usbphy>;
+ phy-names = "usb2-phy";
+ status = "disabled";
+ };
+
+ hevc_dec: codec@800000 {
+ compatible = "brcm,bcm2712-hevc-dec", "raspberrypi,hevc-dec";
+ reg = <0x10 0x00800000 0x0 0x10000>, /* HEVC */
+ <0x10 0x00840000 0x0 0x1000>; /* INTC */
+ reg-names = "hevc",
+ "intc";
+
+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&firmware_clocks 11>;
+ clock-names = "hevc";
+ iommus = <&iommu2>;
+ };
+
+ pisp_be: pisp_be@880000 {
+ compatible = "raspberrypi,pispbe";
+ reg = <0x10 0x00880000 0x0 0x4000>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&firmware_clocks 7>;
+ clocks-names = "isp_be";
+ status = "okay";
+ iommus = <&iommu2>;
+ };
+
+ sdio2: mmc@1100000 {
+ compatible = "brcm,bcm2712-sdhci";
+ reg = <0x10 0x01100000 0x0 0x260>,
+ <0x10 0x01100400 0x0 0x200>;
+ reg-names = "host", "cfg";
+ interrupts = <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk_emmc2>;
+ sdhci-caps-mask = <0x0000C000 0x0>;
+ sdhci-caps = <0x0 0x0>;
+ supports-cqe = <1>;
+ mmc-ddr-3_3v;
+ status = "disabled";
+ };
+
+ v3d: v3d@2000000 {
+ compatible = "brcm,2712-v3d";
+ reg = <0x10 0x02000000 0x0 0x4000>,
+ <0x10 0x02008000 0x0 0x6000>,
+ <0x10 0x02030800 0x0 0x0700>;
+ reg-names = "hub", "core0", "sms";
+
+ power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
+ resets = <&pm BCM2835_RESET_V3D>;
+ clocks = <&firmware_clocks 5>;
+ clocks-names = "v3d";
+ interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+};
+
+&gicv2 {
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+};
+
+&uart10 {
+ compatible = "arm,pl011-axi";
+};
+
+&aon_intr {
+ status = "disabled";
+};
+
+&gio_aon {
+ compatible = "brcm,brcmstb-gpio";
+ brcm,gpio-direct;
+};
+
+&hvs {
+ status = "disabled";
+};
+
+&hdmi0 {
+ status = "disabled";
+};
+
+&hdmi1 {
+ status = "disabled";
+};
+
+&pixelvalve0 {
+ status = "disabled";
+};
+
+&pixelvalve1 {
+ status = "disabled";
+};
+
+&mop {
+ status = "disabled";
+};
+
+&moplet {
+ status = "disabled";
+};
+
+&ddc0 {
+ status = "disabled";
+};
+
+&ddc1 {
+ status = "disabled";
+};
+
+&disp_intr {
+ status = "disabled";
+};
+
+&vc4 {
+ status = "disabled";
+};
+
+&pcie1 {
+ ranges =
+ /* 2GiB, 32-bit, non-prefetchable at PCIe 00_80000000 */
+ <0x02000000 0x00 0x80000000 0x1b 0x80000000 0x00 0x80000000>,
+ /* 14GiB, 64-bit, prefetchable at PCIe 04_00000000 */
+ <0x43000000 0x04 0x00000000 0x18 0x00000000 0x03 0x80000000>;
+};
+
+&pcie2 {
+ brcm,vdm-qos-map = /bits/ 8 <8 8 8 9 10 10 11 11>;
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts
deleted file mode 100644
index 04738bf281eb..000000000000
--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts
+++ /dev/null
@@ -1,254 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include "bcm2712.dtsi"
-
-/ {
- compatible = "raspberrypi,5-model-b", "brcm,bcm2712";
- model = "Raspberry Pi 5";
-
- aliases {
- serial10 = &uart10;
- };
-
- chosen: chosen {
- stdout-path = "serial10:115200n8";
- };
-
- clk_rp1_xosc: clock-50000000 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-output-names = "rp1-xosc";
- clock-frequency = <50000000>;
- };
-
- /* Will be filled by the bootloader */
- memory@0 {
- device_type = "memory";
- reg = <0 0 0 0x28000000>;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <&pwr_button_default>;
- status = "okay";
-
- power_button: power-button {
- label = "pwr_button";
- linux,code = <KEY_POWER>;
- gpios = <&gio 20 GPIO_ACTIVE_LOW>;
- debounce-interval = <50>;
- };
- };
-
- sd_io_1v8_reg: sd-io-1v8-reg {
- compatible = "regulator-gpio";
- regulator-name = "vdd-sd-io";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- regulator-settling-time-us = <5000>;
- gpios = <&gio_aon 3 GPIO_ACTIVE_HIGH>;
- states = <1800000 1>,
- <3300000 0>;
- };
-
- sd_vcc_reg: sd-vcc-reg {
- compatible = "regulator-fixed";
- regulator-name = "vcc-sd";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- enable-active-high;
- gpios = <&gio_aon 4 GPIO_ACTIVE_HIGH>;
- };
-
- wl_on_reg: wl-on-reg {
- compatible = "regulator-fixed";
- regulator-name = "wl-on-regulator";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- pinctrl-0 = <&wl_on_default>;
- pinctrl-names = "default";
- gpio = <&gio 28 GPIO_ACTIVE_HIGH>;
- startup-delay-us = <150000>;
- enable-active-high;
- };
-};
-
-&pinctrl {
- bt_shutdown_default: bt-shutdown-default-state {
- function = "gpio";
- pins = "gpio29";
- };
-
- emmc_sd_default: emmc-sd-default-state {
- pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3";
- bias-pull-up;
- };
-
- pwr_button_default: pwr-button-default-state {
- function = "gpio";
- pins = "gpio20";
- bias-pull-up;
- };
-
- sdio2_30_default: sdio2-30-default-state {
- clk-pins {
- function = "sd2";
- pins = "gpio30";
- bias-disable;
- };
- cmd-pins {
- function = "sd2";
- pins = "gpio31";
- bias-pull-up;
- };
- dat-pins {
- function = "sd2";
- pins = "gpio32", "gpio33", "gpio34", "gpio35";
- bias-pull-up;
- };
- };
-
- uarta_24_default: uarta-24-default-state {
- rts-pins {
- function = "uart0";
- pins = "gpio24";
- bias-disable;
- };
- cts-pins {
- function = "uart0";
- pins = "gpio25";
- bias-pull-up;
- };
- txd-pins {
- function = "uart0";
- pins = "gpio26";
- bias-disable;
- };
- rxd-pins {
- function = "uart0";
- pins = "gpio27";
- bias-pull-up;
- };
- };
-
- wl_on_default: wl-on-default-state {
- function = "gpio";
- pins = "gpio28";
- };
-};
-
-&pinctrl_aon {
- emmc_aon_cd_default: emmc-aon-cd-default-state {
- function = "sd_card_g";
- pins = "aon_gpio5";
- bias-pull-up;
- };
-};
-
-/* The Debug UART, on Rpi5 it's on JST-SH 1.0mm 3-pin connector
- * labeled "UART", i.e. the interface with the system console.
- */
-&uart10 {
- status = "okay";
-};
-
-/* SDIO1 is used to drive the SD card */
-&sdio1 {
- pinctrl-0 = <&emmc_sd_default>, <&emmc_aon_cd_default>;
- pinctrl-names = "default";
- vqmmc-supply = <&sd_io_1v8_reg>;
- vmmc-supply = <&sd_vcc_reg>;
- bus-width = <4>;
- sd-uhs-sdr50;
- sd-uhs-ddr50;
- sd-uhs-sdr104;
- cd-gpios = <&gio_aon 5 GPIO_ACTIVE_LOW>;
-};
-
-&sdio2 {
- pinctrl-0 = <&sdio2_30_default>;
- pinctrl-names = "default";
- bus-width = <4>;
- vmmc-supply = <&wl_on_reg>;
- sd-uhs-ddr50;
- non-removable;
- status = "okay";
- #address-cells = <1>;
- #size-cells = <0>;
-
- wifi: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-&soc {
- firmware: firmware {
- compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";
- #address-cells = <1>;
- #size-cells = <1>;
-
- mboxes = <&mailbox>;
- dma-ranges;
-
- firmware_clocks: clocks {
- compatible = "raspberrypi,firmware-clocks";
- #clock-cells = <1>;
- };
-
- reset: reset {
- compatible = "raspberrypi,firmware-reset";
- #reset-cells = <1>;
- };
- };
-
- power: power {
- compatible = "raspberrypi,bcm2835-power";
- firmware = <&firmware>;
- #power-domain-cells = <1>;
- };
-};
-
-/* uarta communicates with the BT module */
-&uarta {
- uart-has-rtscts;
- pinctrl-0 = <&uarta_24_default &bt_shutdown_default>;
- pinctrl-names = "default";
- status = "okay";
-
- bluetooth: bluetooth {
- compatible = "brcm,bcm43438-bt";
- max-speed = <3000000>;
- shutdown-gpios = <&gio 29 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&hvs {
- clocks = <&firmware_clocks 4>, <&firmware_clocks 16>;
- clock-names = "core", "disp";
-};
-
-&hdmi0 {
- clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
- clock-names = "hdmi", "bvb", "audio", "cec";
-};
-
-&hdmi1 {
- clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
- clock-names = "hdmi", "bvb", "audio", "cec";
-};
-
-&pcie1 {
- status = "okay";
-};
-
-&pcie2 {
- status = "okay";
-};
diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
index 3e0319fdb93f..632af5b67a3f 100644
--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
@@ -16,16 +16,174 @@
/dts-v1/;
-#include "bcm2712-rpi-5-b-ovl-rp1.dts"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/rp1.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/mfd/rp1.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
+
+#include "bcm2712-ds.dtsi"
/ {
- aliases {
- ethernet0 = &rp1_eth;
+ compatible = "raspberrypi,5-model-b", "brcm,bcm2712";
+ model = "Raspberry Pi 5";
+
+ /* Will be filled by the bootloader */
+ memory@0 {
+ device_type = "memory";
+#ifndef FIRMWARE_UPDATED
+ reg = <0 0 0x28000000>;
+#else
+ reg = <0 0 0 0x28000000>;
+#endif
+ };
+
+ leds: leds {
+ compatible = "gpio-leds";
+
+ led_pwr: led-pwr {
+ label = "PWR";
+ gpios = <&rp1_gpio 44 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ linux,default-trigger = "none";
+ };
+
+ led_act: led-act {
+ label = "ACT";
+ gpios = <&gio_aon 9 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ linux,default-trigger = "mmc0";
+ };
+ };
+
+ sd_io_1v8_reg: sd-io-1v8-reg {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-sd-io";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-settling-time-us = <5000>;
+ gpios = <&gio_aon 3 GPIO_ACTIVE_HIGH>;
+ states = <1800000 1>,
+ <3300000 0>;
+ };
+
+ sd_vcc_reg: sd-vcc-reg {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ enable-active-high;
+ gpios = <&gio_aon 4 GPIO_ACTIVE_HIGH>;
+ };
+
+ wl_on_reg: wl-on-reg {
+ compatible = "regulator-fixed";
+ regulator-name = "wl-on-regulator";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ pinctrl-0 = <&wl_on_pins>;
+ pinctrl-names = "default";
+
+ gpio = <&gio 28 GPIO_ACTIVE_HIGH>;
+
+ startup-delay-us = <150000>;
+ enable-active-high;
+ };
+
+ cam1_clk: cam1_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ status = "disabled";
+ };
+
+ cam0_clk: cam0_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ status = "disabled";
+ };
+
+ cam0_reg: cam0_reg {
+ compatible = "regulator-fixed";
+ regulator-name = "cam0_reg";
+ enable-active-high;
+ gpio = <&rp1_gpio 34 0>; // CD0_IO0_MICCLK, to MIPI 0 connector
};
+
+ cam1_reg: cam1_reg {
+ compatible = "regulator-fixed";
+ regulator-name = "cam1_reg";
+ enable-active-high;
+ gpio = <&rp1_gpio 46 0>; // CD1_IO0_MICCLK, to MIPI 1 connector
+ };
+
+ cam_dummy_reg: cam_dummy_reg {
+ compatible = "regulator-fixed";
+ regulator-name = "cam-dummy-reg";
+ };
+
+ dummy: dummy {
+ // A target for unwanted overlay fragments
+ };
+
+
+ // A few extra labels to keep overlays happy
+
+ i2c0if: i2c0if {};
+ i2c0mux: i2c0mux {};
};
-&pcie2 {
- #include "rp1-nexus.dtsi"
+rp1_target: &pcie2 {
+ brcm,vdm-qos-map = /bits/ 8 <8 8 8 9 10 10 11 11>;
+ aspm-no-l0s;
+ status = "okay";
+};
+
+&pcie1 {
+ brcm,fifo-qos-map = /bits/ 8 <3 3 3 3>;
+};
+
+// The system SPI for the bootloader EEPROM
+&spi10 { status = "okay"; };
+
+#include "rp1.dtsi"
+
+&rp1 {
+ // PCIe address space layout:
+ // 00_00000000-00_00xxxxxx = RP1 peripherals
+ // 10_00000000-1x_xxxxxxxx = up to 64GB system RAM
+
+ // outbound access aimed at PCIe 0_00xxxxxx -> RP1 c0_40xxxxxx
+ // This is the RP1 peripheral space
+ ranges = <0xc0 0x40000000
+ 0x02000000 0x00 0x00000000
+ 0x00 0x00410000>;
+
+ dma-ranges =
+ // inbound RP1 1x_xxxxxxxx -> PCIe 1x_xxxxxxxx
+ <0x10 0x00000000
+ 0x43000000 0x10 0x00000000
+ 0x10 0x00000000>,
+
+ // inbound RP1 c0_40xxxxxx -> PCIe 00_00xxxxxx
+ // This allows the RP1 DMA controller to address RP1 hardware
+ <0xc0 0x40000000
+ 0x02000000 0x0 0x00000000
+ 0x0 0x00410000>,
+
+ // inbound RP1 0x_xxxxxxxx -> PCIe 1x_xxxxxxxx
+ <0x00 0x00000000
+ 0x02000000 0x10 0x00000000
+ 0x10 0x00000000>;
+};
+
+// Expose RP1 nodes as system nodes with labels
+
+&rp1_dma {
+ status = "okay";
};
&rp1_eth {
@@ -34,35 +192,600 @@
assigned-clock-rates = <50000000>,
<125000000>;
status = "okay";
- phy-mode = "rgmii-id";
phy-handle = <&phy1>;
+ phy-reset-gpios = <&rp1_gpio 32 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <5>;
- mdio {
+ phy1: ethernet-phy@1 {
reg = <0x1>;
- reset-gpios = <&rp1_gpio 32 GPIO_ACTIVE_LOW>;
- reset-delay-us = <5000>;
+ brcm,powerdown-enable;
+ eee-broken-1000t;
+ eee-broken-100tx;
+ };
+};
+
+/* The Debug UART, on Rpi5 it's on JST-SH 1.0mm 3-pin connector
+ * labeled "UART", i.e. the interface with the system console.
+ */
+&uart10 {
+ status = "okay";
+};
+
+gpio: &rp1_gpio {
+ status = "okay";
+};
+
+aux: &dummy {};
+
+&rp1_usb0 {
+ pinctrl-0 = <&usb_vbus_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&rp1_usb1 {
+ status = "okay";
+};
+
+#include "bcm2712-rpi.dtsi"
+
+i2c_csi_dsi0: &i2c6 { // Note: This is for MIPI0 connector only
+ pinctrl-0 = <&rp1_i2c6_38_39>;
+ pinctrl-names = "default";
+ clock-frequency = <100000>;
+ symlink = "i2c-6";
+};
+
+i2c_csi_dsi1: &i2c4 { // Note: This is for MIPI1 connector only
+ pinctrl-0 = <&rp1_i2c4_40_41>;
+ pinctrl-names = "default";
+ clock-frequency = <100000>;
+ symlink = "i2c-4";
+};
+
+i2c_csi_dsi: &i2c_csi_dsi1 { }; // An alias for compatibility
+
+csi0: &rp1_csi0 { };
+csi1: &rp1_csi1 { };
+dsi0: &rp1_dsi0 { };
+dsi1: &rp1_dsi1 { };
+dpi: &rp1_dpi { };
+vec: &rp1_vec { };
+dpi_gpio0: &rp1_dpi_24bit_gpio0 { };
+dpi_gpio1: &rp1_dpi_24bit_gpio2 { };
+dpi_18bit_cpadhi_gpio0: &rp1_dpi_18bit_cpadhi_gpio0 { };
+dpi_18bit_cpadhi_gpio2: &rp1_dpi_18bit_cpadhi_gpio2 { };
+dpi_18bit_gpio0: &rp1_dpi_18bit_gpio0 { };
+dpi_18bit_gpio2: &rp1_dpi_18bit_gpio2 { };
+dpi_16bit_cpadhi_gpio0: &rp1_dpi_16bit_cpadhi_gpio0 { };
+dpi_16bit_cpadhi_gpio2: &rp1_dpi_16bit_cpadhi_gpio2 { };
+dpi_16bit_gpio0: &rp1_dpi_16bit_gpio0 { };
+dpi_16bit_gpio2: &rp1_dpi_16bit_gpio2 { };
+
+/* Add the IOMMUs for some RP1 bus masters */
+
+&csi0 {
+ iommus = <&iommu5>;
+};
+
+&csi1 {
+ iommus = <&iommu5>;
+};
+
+&dsi0 {
+ iommus = <&iommu5>;
+};
+
+&dsi1 {
+ iommus = <&iommu5>;
+};
+
+&dpi {
+ iommus = <&iommu5>;
+};
+
+&vec {
+ iommus = <&iommu5>;
+};
+
+&ddc0 {
+ status = "disabled";
+};
+
+&ddc1 {
+ status = "disabled";
+};
+
+&hdmi0 {
+ clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
+ clock-names = "hdmi", "bvb", "audio", "cec";
+ status = "disabled";
+};
+
+&hdmi1 {
+ clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
+ clock-names = "hdmi", "bvb", "audio", "cec";
+ status = "disabled";
+};
+
+&hvs {
+ clocks = <&firmware_clocks 4>, <&firmware_clocks 16>;
+ clock-names = "core", "disp";
+};
+
+&mop {
+ status = "disabled";
+};
+
+&moplet {
+ status = "disabled";
+};
+
+&pixelvalve0 {
+ status = "disabled";
+};
+
+&pixelvalve1 {
+ status = "disabled";
+};
+
+&disp_intr {
+ status = "disabled";
+};
+
+/* SDIO1 is used to drive the SD card */
+&sdio1 {
+ pinctrl-0 = <&emmc_sd_pulls>, <&emmc_aon_cd_pins>;
+ pinctrl-names = "default";
+ vqmmc-supply = <&sd_io_1v8_reg>;
+ vmmc-supply = <&sd_vcc_reg>;
+ bus-width = <4>;
+ sd-uhs-sdr50;
+ sd-uhs-ddr50;
+ sd-uhs-sdr104;
+ supports-cqe = <1>;
+ cd-gpios = <&gio_aon 5 GPIO_ACTIVE_LOW>;
+ //no-1-8-v;
+ status = "okay";
+};
+
+&pinctrl_aon {
+ emmc_aon_cd_pins: emmc_aon_cd_pins {
+ function = "sd_card_g";
+ pins = "aon_gpio5";
+ bias-pull-up;
+ };
+
+ /* Slight hack - only one PWM pin (status LED) is usable */
+ aon_pwm_1pin: aon_pwm_1pin {
+ function = "aon_pwm";
+ pins = "aon_gpio9";
+ };
+};
+
+&pinctrl {
+ pwr_button_pins: pwr_button_pins {
+ function = "gpio";
+ pins = "gpio20";
+ bias-pull-up;
+ };
+
+ wl_on_pins: wl_on_pins {
+ function = "gpio";
+ pins = "gpio28";
+ };
+
+ bt_shutdown_pins: bt_shutdown_pins {
+ function = "gpio";
+ pins = "gpio29";
+ };
+
+ emmc_sd_pulls: emmc_sd_pulls {
+ pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3";
+ bias-pull-up;
+ };
+};
+
+/* uarta communicates with the BT module */
+&uarta {
+ uart-has-rtscts;
+ auto-flow-control;
+ status = "okay";
+ clock-frequency = <96000000>;
+ pinctrl-0 = <&uarta_24_pins &bt_shutdown_pins>;
+ pinctrl-names = "default";
+
+ bluetooth: bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ max-speed = <3000000>;
+ shutdown-gpios = <&gio 29 GPIO_ACTIVE_HIGH>;
+ local-bd-address = [ 00 00 00 00 00 00 ];
+ };
+};
+
+&i2c10 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&i2c3_m4_agpio0_pins>;
+ pinctrl-names = "default";
+};
+
+/ {
+ fan: cooling_fan {
+ status = "disabled";
+ compatible = "pwm-fan";
+ #cooling-cells = <2>;
+ cooling-min-state = <0>;
+ cooling-max-state = <3>;
+ cooling-levels = <0 75 125 175 250>;
+ pwms = <&rp1_pwm1 3 41566 PWM_POLARITY_INVERTED>;
+ rpm-regmap = <&rp1_pwm1>;
+ rpm-offset = <0x3c>;
+ };
+
+ pwr_button {
+ compatible = "gpio-keys";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwr_button_pins>;
+ status = "okay";
+
+ pwr_key: pwr {
+ label = "pwr_button";
+ // linux,code = <205>; // KEY_SUSPEND
+ linux,code = <116>; // KEY_POWER
+ gpios = <&gio 20 GPIO_ACTIVE_LOW>;
+ debounce-interval = <50>; // ms
+ };
+ };
+};
+
+&usb {
+ power-domains = <&power RPI_POWER_DOMAIN_USB>;
+};
+
+/* SDIO2 drives the WLAN interface */
+&sdio2 {
+ pinctrl-0 = <&sdio2_30_pins>;
+ pinctrl-names = "default";
+ bus-width = <4>;
+ vmmc-supply = <&wl_on_reg>;
+ sd-uhs-ddr50;
+ non-removable;
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ wifi: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ local-mac-address = [00 00 00 00 00 00];
+ };
+};
+
+&pinctrl {
+ spi10_gpio2: spi10_gpio2 {
+ function = "vc_spi0";
+ pins = "gpio2", "gpio3", "gpio4";
+ bias-disable;
+ };
+
+ spi10_cs_gpio1: spi10_cs_gpio1 {
+ function = "gpio";
+ pins = "gpio1";
+ bias-pull-up;
+ };
+};
+
+spi10_pins: &spi10_gpio2 {};
+spi10_cs_pins: &spi10_cs_gpio1 {};
+
+&spi10 {
+ pinctrl-names = "default";
+ cs-gpios = <&gio 1 1>;
+ pinctrl-0 = <&spi10_pins &spi10_cs_pins>;
+
+ spidev10: spidev@0 {
+ compatible = "spidev";
+ reg = <0>; /* CE0 */
#address-cells = <1>;
#size-cells = <0>;
+ spi-max-frequency = <20000000>;
+ status = "okay";
+ };
+};
- phy1: ethernet-phy@1 {
- reg = <0x1>;
- };
+// =============================================
+// Board specific stuff here
+
+&gio_aon {
+ // Don't use GIO_AON as an interrupt controller because it will
+ // clash with the firmware monitoring the PMIC interrupt via the VPU.
+
+ /delete-property/ interrupt-controller;
+ /delete-property/ #interrupt-cells;
+};
+
+&main_aon_irq {
+ // Don't use the MAIN_AON_IRQ interrupt controller because it will
+ // clash with the firmware monitoring the PMIC interrupt via the VPU.
+
+ status = "disabled";
+};
+
+&rp1_pwm1 {
+ status = "disabled";
+ pinctrl-0 = <&rp1_pwm1_gpio45>;
+ pinctrl-names = "default";
+};
+
+&thermal_trips {
+ cpu_tepid: cpu-tepid {
+ temperature = <50000>;
+ hysteresis = <5000>;
+ type = "active";
+ };
+
+ cpu_warm: cpu-warm {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "active";
+ };
+
+ cpu_hot: cpu-hot {
+ temperature = <67500>;
+ hysteresis = <5000>;
+ type = "active";
+ };
+
+ cpu_vhot: cpu-vhot {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "active";
+ };
+};
+
+&cooling_maps {
+ tepid {
+ trip = <&cpu_tepid>;
+ cooling-device = <&fan 1 1>;
+ };
+
+ warm {
+ trip = <&cpu_warm>;
+ cooling-device = <&fan 2 2>;
+ };
+
+ hot {
+ trip = <&cpu_hot>;
+ cooling-device = <&fan 3 3>;
+ };
+
+ vhot {
+ trip = <&cpu_vhot>;
+ cooling-device = <&fan 4 4>;
+ };
+
+ melt {
+ trip = <&cpu_crit>;
+ cooling-device = <&fan 4 4>;
+ };
+};
+
+&gio {
+ // The GPIOs above 35 are not used on Pi 5, so shrink the upper bank
+ // to reduce the clutter in gpioinfo/pinctrl
+ brcm,gpio-bank-widths = <32 4>;
+
+ gpio-line-names =
+ "-", // GPIO_000
+ "2712_BOOT_CS_N", // GPIO_001
+ "2712_BOOT_MISO", // GPIO_002
+ "2712_BOOT_MOSI", // GPIO_003
+ "2712_BOOT_SCLK", // GPIO_004
+ "-", // GPIO_005
+ "-", // GPIO_006
+ "-", // GPIO_007
+ "-", // GPIO_008
+ "-", // GPIO_009
+ "-", // GPIO_010
+ "-", // GPIO_011
+ "-", // GPIO_012
+ "-", // GPIO_013
+ "PCIE_SDA", // GPIO_014
+ "PCIE_SCL", // GPIO_015
+ "-", // GPIO_016
+ "-", // GPIO_017
+ "-", // GPIO_018
+ "-", // GPIO_019
+ "PWR_GPIO", // GPIO_020
+ "2712_G21_FS", // GPIO_021
+ "-", // GPIO_022
+ "-", // GPIO_023
+ "BT_RTS", // GPIO_024
+ "BT_CTS", // GPIO_025
+ "BT_TXD", // GPIO_026
+ "BT_RXD", // GPIO_027
+ "WL_ON", // GPIO_028
+ "BT_ON", // GPIO_029
+ "WIFI_SDIO_CLK", // GPIO_030
+ "WIFI_SDIO_CMD", // GPIO_031
+ "WIFI_SDIO_D0", // GPIO_032
+ "WIFI_SDIO_D1", // GPIO_033
+ "WIFI_SDIO_D2", // GPIO_034
+ "WIFI_SDIO_D3"; // GPIO_035
+};
+
+&gio_aon {
+ gpio-line-names =
+ "RP1_SDA", // AON_GPIO_00
+ "RP1_SCL", // AON_GPIO_01
+ "RP1_RUN", // AON_GPIO_02
+ "SD_IOVDD_SEL", // AON_GPIO_03
+ "SD_PWR_ON", // AON_GPIO_04
+ "SD_CDET_N", // AON_GPIO_05
+ "SD_FLG_N", // AON_GPIO_06
+ "-", // AON_GPIO_07
+ "2712_WAKE", // AON_GPIO_08
+ "2712_STAT_LED", // AON_GPIO_09
+ "-", // AON_GPIO_10
+ "-", // AON_GPIO_11
+ "PMIC_INT", // AON_GPIO_12
+ "UART_TX_FS", // AON_GPIO_13
+ "UART_RX_FS", // AON_GPIO_14
+ "-", // AON_GPIO_15
+ "-", // AON_GPIO_16
+
+ // Pad bank0 out to 32 entries
+ "", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
+
+ "HDMI0_SCL", // AON_SGPIO_00
+ "HDMI0_SDA", // AON_SGPIO_01
+ "HDMI1_SCL", // AON_SGPIO_02
+ "HDMI1_SDA", // AON_SGPIO_03
+ "PMIC_SCL", // AON_SGPIO_04
+ "PMIC_SDA"; // AON_SGPIO_05
+
+ rp1_run_hog {
+ gpio-hog;
+ gpios = <2 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "RP1 RUN pin";
};
};
&rp1_gpio {
- usb_vbus_default_state: usb-vbus-default-state {
+ gpio-line-names =
+ "ID_SDA", // GPIO0
+ "ID_SCL", // GPIO1
+ "GPIO2", // GPIO2
+ "GPIO3", // GPIO3
+ "GPIO4", // GPIO4
+ "GPIO5", // GPIO5
+ "GPIO6", // GPIO6
+ "GPIO7", // GPIO7
+ "GPIO8", // GPIO8
+ "GPIO9", // GPIO9
+ "GPIO10", // GPIO10
+ "GPIO11", // GPIO11
+ "GPIO12", // GPIO12
+ "GPIO13", // GPIO13
+ "GPIO14", // GPIO14
+ "GPIO15", // GPIO15
+ "GPIO16", // GPIO16
+ "GPIO17", // GPIO17
+ "GPIO18", // GPIO18
+ "GPIO19", // GPIO19
+ "GPIO20", // GPIO20
+ "GPIO21", // GPIO21
+ "GPIO22", // GPIO22
+ "GPIO23", // GPIO23
+ "GPIO24", // GPIO24
+ "GPIO25", // GPIO25
+ "GPIO26", // GPIO26
+ "GPIO27", // GPIO27
+
+ "PCIE_RP1_WAKE", // GPIO28
+ "FAN_TACH", // GPIO29
+ "HOST_SDA", // GPIO30
+ "HOST_SCL", // GPIO31
+ "ETH_RST_N", // GPIO32
+ "-", // GPIO33
+
+ "CD0_IO0_MICCLK", // GPIO34
+ "CD0_IO0_MICDAT0", // GPIO35
+ "RP1_PCIE_CLKREQ_N", // GPIO36
+ "-", // GPIO37
+ "CD0_SDA", // GPIO38
+ "CD0_SCL", // GPIO39
+ "CD1_SDA", // GPIO40
+ "CD1_SCL", // GPIO41
+ "USB_VBUS_EN", // GPIO42
+ "USB_OC_N", // GPIO43
+ "RP1_STAT_LED", // GPIO44
+ "FAN_PWM", // GPIO45
+ "CD1_IO0_MICCLK", // GPIO46
+ "2712_WAKE", // GPIO47
+ "CD1_IO1_MICDAT1", // GPIO48
+ "EN_MAX_USB_CUR", // GPIO49
+ "-", // GPIO50
+ "-", // GPIO51
+ "-", // GPIO52
+ "-"; // GPIO53
+
+ usb_vbus_pins: usb_vbus_pins {
function = "vbus1";
- groups = "vbus1";
+ pins = "gpio42", "gpio43";
};
};
-&rp1_usb0 {
- pinctrl-0 = <&usb_vbus_default_state>;
- pinctrl-names = "default";
+/ {
+ __overrides__ {
+ sd_cqe = <&sdio1>, "supports-cqe:0";
+ };
+};
+
+&hvs {
+ clocks = <&firmware_clocks 4>, <&firmware_clocks 16>;
+ clock-names = "core", "disp";
+};
+
+&hdmi0 {
+ clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
+ clock-names = "hdmi", "bvb", "audio", "cec";
+};
+
+&hdmi1 {
+ clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
+ clock-names = "hdmi", "bvb", "audio", "cec";
+};
+
+&soc {
+ firmware: firmware {
+ compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ mboxes = <&mailbox>;
+ dma-ranges;
+
+ firmware_clocks: clocks {
+ compatible = "raspberrypi,firmware-clocks";
+ #clock-cells = <1>;
+ };
+
+ reset: reset {
+ compatible = "raspberrypi,firmware-reset";
+ #reset-cells = <1>;
+ };
+ };
+
+ power: power {
+ compatible = "raspberrypi,bcm2835-power";
+ firmware = <&firmware>;
+ #power-domain-cells = <1>;
+ };
+};
+
+&hvs {
+ clocks = <&firmware_clocks 4>, <&firmware_clocks 16>;
+ clock-names = "core", "disp";
+};
+
+&hdmi0 {
+ clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
+ clock-names = "hdmi", "bvb", "audio", "cec";
+};
+
+&hdmi1 {
+ clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
+ clock-names = "hdmi", "bvb", "audio", "cec";
+};
+
+&pcie1 {
status = "okay";
+ brcm,clkreq-mode = "safe";
};
-&rp1_usb1 {
+&pcie2 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi
new file mode 100644
index 000000000000..89fc3de49300
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi
@@ -0,0 +1,477 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dt-bindings/power/raspberrypi-power.h>
+
+&soc {
+ firmware: firmware {
+ compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ mboxes = <&mailbox>;
+ dma-ranges;
+
+ firmware_clocks: clocks {
+ compatible = "raspberrypi,firmware-clocks";
+ #clock-cells = <1>;
+ };
+
+ reset: reset {
+ compatible = "raspberrypi,firmware-reset";
+ #reset-cells = <1>;
+ };
+
+ vcio: vcio {
+ compatible = "raspberrypi,vcio";
+ };
+ };
+
+ power: power {
+ compatible = "raspberrypi,bcm2835-power";
+ firmware = <&firmware>;
+ #power-domain-cells = <1>;
+ };
+
+ fb: fb {
+ compatible = "brcm,bcm2708-fb";
+ firmware = <&firmware>;
+ status = "okay";
+ };
+
+ rpi_rtc: rpi_rtc {
+ compatible = "raspberrypi,rpi-rtc";
+ firmware = <&firmware>;
+ status = "okay";
+ trickle-charge-microvolt = <0>;
+ };
+
+ nvmem {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ nvmem_otp: nvmem_otp {
+ compatible = "raspberrypi,rpi-otp";
+ firmware = <&firmware>;
+ reg = <0 192>;
+ status = "okay";
+ };
+
+ nvmem_cust: nvmem_cust {
+ compatible = "raspberrypi,rpi-otp";
+ firmware = <&firmware>;
+ reg = <1 8>;
+ status = "okay";
+ };
+
+ nvmem_mac: nvmem_mac {
+ compatible = "raspberrypi,rpi-otp";
+ firmware = <&firmware>;
+ reg = <2 6>;
+ status = "okay";
+ };
+
+ nvmem_priv: nvmem_priv {
+ compatible = "raspberrypi,rpi-otp";
+ firmware = <&firmware>;
+ reg = <3 16>;
+ status = "okay";
+ };
+ };
+
+ /* Define these notional regulators for use by overlays, etc. */
+ vdd_3v3_reg: fixedregulator_3v3 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "3v3";
+ };
+
+ vdd_5v0_reg: fixedregulator_5v0 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "5v0";
+ };
+};
+
+pio: &rp1_pio {
+ status = "okay";
+};
+
+/ {
+ chosen: chosen {
+ bootargs = "reboot=w coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe cgroup_disable=memory numa_policy=interleave";
+ stdout-path = "serial10:115200n8";
+ };
+
+ aliases: aliases {
+ blconfig = &blconfig;
+ blpubkey = &blpubkey;
+ bluetooth = &bluetooth;
+ console = &uart10;
+ drm-dsi1 = &dsi0;
+ drm-dsi2 = &dsi1;
+ ethernet0 = &rp1_eth;
+ fb = &fb;
+ gpio0 = &gpio;
+ gpio1 = &gio;
+ gpio2 = &gio_aon;
+ gpio3 = &pinctrl;
+ gpio4 = &pinctrl_aon;
+ gpiochip0 = &gpio;
+ gpiochip10 = &gio;
+ i2c = &i2c_arm;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c10 = &i2c_csi_dsi0;
+ i2c11 = &i2c_csi_dsi1;
+ i2c12 = &i2c10;
+ mailbox = &mailbox;
+ mmc0 = &sdio1;
+ pio0 = &pio;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial10 = &uart10;
+ serial2 = &uart2;
+ serial3 = &uart3;
+ serial4 = &uart4;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ spi10 = &spi10;
+ spi2 = &spi2;
+ spi3 = &spi3;
+ spi4 = &spi4;
+ spi5 = &spi5;
+ uart0 = &uart0;
+ uart1 = &uart1;
+ uart10 = &uart10;
+ uart2 = &uart2;
+ uart3 = &uart3;
+ uart4 = &uart4;
+ usb0 = &rp1_usb0;
+ usb1 = &rp1_usb1;
+ wifi0 = &wifi;
+ };
+
+ __overrides__ {
+ act_led_gpio = <&led_act>,"gpios:4",<&led_act>,"gpios:0=",<&gpio>;
+ act_led_activelow = <&led_act>, "gpios:8";
+ act_led_trigger = <&led_act>, "linux,default-trigger";
+ axiperf = <&axiperf>,"status";
+ bdaddr = <&bluetooth>, "local-bd-address[";
+ button_debounce = <&pwr_key>, "debounce-interval:0";
+ cooling_fan = <&fan>, "status", <&rp1_pwm1>, "status";
+ drm_fb0_rp1_dpi = <&aliases>, "drm-fb0=",&dpi;
+ drm_fb0_rp1_dsi0 = <&aliases>, "drm-fb0=",&dsi0;
+ drm_fb0_rp1_dsi1 = <&aliases>, "drm-fb0=",&dsi1;
+ drm_fb0_vc4 = <&aliases>, "drm-fb0=",&vc4;
+ drm_fb1_rp1_dpi = <&aliases>, "drm-fb1=",&dpi;
+ drm_fb1_rp1_dsi0 = <&aliases>, "drm-fb1=",&dsi0;
+ drm_fb1_rp1_dsi1 = <&aliases>, "drm-fb1=",&dsi1;
+ drm_fb1_vc4 = <&aliases>, "drm-fb1=",&vc4;
+ drm_fb2_rp1_dpi = <&aliases>, "drm-fb2=",&dpi;
+ drm_fb2_rp1_dsi0 = <&aliases>, "drm-fb2=",&dsi0;
+ drm_fb2_rp1_dsi1 = <&aliases>, "drm-fb2=",&dsi1;
+ drm_fb2_vc4 = <&aliases>, "drm-fb2=",&vc4;
+ eth_led0 = <&phy1>,"led-modes:0";
+ eth_led1 = <&phy1>,"led-modes:4";
+ fan_temp0 = <&cpu_tepid>,"temperature:0";
+ fan_temp0_hyst = <&cpu_tepid>,"hysteresis:0";
+ fan_temp0_speed = <&fan>, "cooling-levels:4";
+ fan_temp1 = <&cpu_warm>,"temperature:0";
+ fan_temp1_hyst = <&cpu_warm>,"hysteresis:0";
+ fan_temp1_speed = <&fan>, "cooling-levels:8";
+ fan_temp2 = <&cpu_hot>,"temperature:0";
+ fan_temp2_hyst = <&cpu_hot>,"hysteresis:0";
+ fan_temp2_speed = <&fan>, "cooling-levels:12";
+ fan_temp3 = <&cpu_vhot>,"temperature:0";
+ fan_temp3_hyst = <&cpu_vhot>,"hysteresis:0";
+ fan_temp3_speed = <&fan>, "cooling-levels:16";
+ i2c = <&i2c1>, "status";
+ i2c_arm = <&i2c_arm>, "status";
+ i2c_arm_baudrate = <&i2c_arm>, "clock-frequency:0";
+ i2c_baudrate = <&i2c_arm>, "clock-frequency:0";
+ i2c_csi_dsi = <&i2c_csi_dsi>, "status";
+ i2c_csi_dsi0 = <&i2c_csi_dsi0>, "status";
+ i2c_csi_dsi1 = <&i2c_csi_dsi1>, "status";
+ i2c_vc = <&i2c_vc>, "status";
+ i2c_vc_baudrate = <&i2c_vc>, "clock-frequency:0";
+ i2c0 = <&i2c0>, "status";
+ i2c0_baudrate = <&i2c0>, "clock-frequency:0";
+ i2c1 = <&i2c1>, "status";
+ i2c1_baudrate = <&i2c1>, "clock-frequency:0";
+ krnbt = <&bluetooth>, "status";
+ nvme = <&pciex1>, "status";
+ nvmem_cust_rw = <&nvmem_cust>,"rw?";
+ nvmem_mac_rw = <&nvmem_mac>,"rw?";
+ nvmem_priv_rw = <&nvmem_priv>,"rw?";
+ pcie_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0";
+ pciex1 = <&pciex1>, "status";
+ pciex1_gen = <&pciex1> , "max-link-speed:0";
+ pciex1_no_l0s = <&pciex1>, "aspm-no-l0s?";
+ pciex1_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0";
+ pwr_led_gpio = <&led_pwr>, "gpios:4";
+ pwr_led_activelow = <&led_pwr>, "gpios:8";
+ pwr_led_trigger = <&led_pwr>, "linux,default-trigger";
+ random = <&random>, "status";
+ rtc = <&rpi_rtc>, "status";
+ rtc_bbat_vchg = <&rpi_rtc>, "trickle-charge-microvolt:0";
+ spi = <&spi0>, "status";
+ strict_gpiod = <&chosen>, "bootargs=pinctrl_rp1.persist_gpio_outputs=n";
+ suspend = <&pwr_key>, "linux,code:0=205";
+ uart0 = <&uart0>, "status";
+ uart0_console = <&uart0>,"status", <&aliases>, "console=",&uart0;
+ wifiaddr = <&wifi>, "local-mac-address[";
+
+ cam0_reg = <&cam0_reg>,"status";
+ cam0_reg_gpio = <&cam0_reg>,"gpio:4",
+ <&cam0_reg>,"gpio:0=", <&gpio>;
+ cam1_reg = <&cam1_reg>,"status";
+ cam1_reg_gpio = <&cam1_reg>,"gpio:4",
+ <&cam1_reg>,"gpio:0=", <&gpio>;
+ };
+};
+
+pciex1: &pcie1 { };
+pciex4: &pcie2 { };
+
+&dma32 {
+ /* The VPU firmware uses DMA channel 11 for VCHIQ */
+ brcm,dma-channel-mask = <0x03f>;
+};
+
+&dma40 {
+ /* The VPU firmware DMA channel 11 for VCHIQ */
+ brcm,dma-channel-mask = <0x07c0>;
+};
+
+&hdmi0 {
+ dmas = <&dma40 (10|(1<<30)|(1<<24)|(10<<16)|(15<<20))>;
+ dma-names = "audio-rx";
+};
+
+&hdmi1 {
+ dmas = <&dma40 (17|(1<<30)|(1<<24)|(10<<16)|(15<<20))>;
+ dma-names = "audio-rx";
+};
+
+&spi10 {
+ dmas = <&dma40 6>, <&dma40 7>;
+ dma-names = "tx", "rx";
+};
+
+&usb {
+ power-domains = <&power RPI_POWER_DOMAIN_USB>;
+};
+
+&rmem {
+ /*
+ * RPi5's co-processor will copy the board's bootloader configuration
+ * into memory for the OS to consume. It'll also update this node with
+ * its placement information.
+ */
+ blconfig: nvram@0 {
+ compatible = "raspberrypi,bootloader-config", "nvmem-rmem";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x0 0x0 0x0>;
+ no-map;
+ status = "disabled";
+ };
+ /*
+ * RPi5 will copy the binary public key blob (if present) from the bootloader
+ * into memory for use by the OS.
+ */
+ blpubkey: nvram@1 {
+ compatible = "raspberrypi,bootloader-public-key", "nvmem-rmem";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x0 0x0 0x0>;
+ no-map;
+ status = "disabled";
+ };
+};
+
+&rp1_adc {
+ status = "okay";
+};
+
+&rp1_mbox {
+ status = "okay";
+};
+
+/* Add some gpiomem nodes to make the devices accessible to userspace.
+ * /dev/gpiomem<n> should expose the registers for the interface with DT alias
+ * gpio<n>.
+ */
+
+&rp1 {
+ gpiomem@d0000 {
+ /* Export IO_BANKs, RIO_BANKs and PADS_BANKs to userspace */
+ compatible = "raspberrypi,gpiomem";
+ reg = <0xc0 0x400d0000 0x0 0x30000>;
+ chardev-name = "gpiomem0";
+ };
+};
+
+&soc {
+ gpiomem@7d508500 {
+ compatible = "raspberrypi,gpiomem";
+ reg = <0x7d508500 0x40>;
+ chardev-name = "gpiomem1";
+ };
+
+ gpiomem@7d517c00 {
+ compatible = "raspberrypi,gpiomem";
+ reg = <0x7d517c00 0x40>;
+ chardev-name = "gpiomem2";
+ };
+
+ gpiomem@7d504100 {
+ compatible = "raspberrypi,gpiomem";
+ reg = <0x7d504100 0x20>;
+ chardev-name = "gpiomem3";
+ };
+
+ gpiomem@7d510700 {
+ compatible = "raspberrypi,gpiomem";
+ reg = <0x7d510700 0x20>;
+ chardev-name = "gpiomem4";
+ };
+
+ sound: sound {
+ status = "disabled";
+ };
+};
+
+i2c0: &rp1_i2c0 { };
+i2c1: &rp1_i2c1 { };
+i2c2: &rp1_i2c2 { };
+i2c3: &rp1_i2c3 { };
+i2c4: &rp1_i2c4 { };
+i2c5: &rp1_i2c5 { };
+i2c6: &rp1_i2c6 { };
+i2s: &rp1_i2s0 { };
+i2s_clk_producer: &rp1_i2s0 { };
+i2s_clk_consumer: &rp1_i2s1 { };
+pwm0: &rp1_pwm0 { };
+pwm1: &rp1_pwm1 { };
+pwm: &pwm0 { };
+spi0: &rp1_spi0 { };
+spi1: &rp1_spi1 { };
+spi2: &rp1_spi2 { };
+spi3: &rp1_spi3 { };
+spi4: &rp1_spi4 { };
+spi5: &rp1_spi5 { };
+
+uart0_pins: &rp1_uart0_14_15 {};
+uart0_ctsrts_pins: &rp1_uart0_ctsrts_16_17 {};
+uart0: &rp1_uart0 {
+ pinctrl-0 = <&uart0_pins>;
+};
+
+uart1_pins: &rp1_uart1_0_1 {};
+uart1_ctsrts_pins: &rp1_uart1_ctsrts_2_3 {};
+uart1: &rp1_uart1 { };
+
+uart2_pins: &rp1_uart2_4_5 {};
+uart2_ctsrts_pins: &rp1_uart2_ctsrts_6_7 {};
+uart2: &rp1_uart2 { };
+
+uart3_pins: &rp1_uart3_8_9 {};
+uart3_ctsrts_pins: &rp1_uart3_ctsrts_10_11 {};
+uart3: &rp1_uart3 { };
+
+uart4_pins: &rp1_uart4_12_13 {};
+uart4_ctsrts_pins: &rp1_uart4_ctsrts_14_15 {};
+uart4: &rp1_uart4 { };
+
+i2c0_pins: &rp1_i2c0_0_1 {};
+i2c_vc: &i2c0 { // This is pins 27,28 on the header (not MIPI)
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+ clock-frequency = <100000>;
+};
+
+i2c1_pins: &rp1_i2c1_2_3 {};
+i2c_arm: &i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ clock-frequency = <100000>;
+};
+
+i2c2_pins: &rp1_i2c2_4_5 {};
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins>;
+};
+
+i2c3_pins: &rp1_i2c3_6_7 {};
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3_pins>;
+};
+
+&i2s_clk_producer {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rp1_i2s0_18_21>;
+};
+
+&i2s_clk_consumer {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rp1_i2s1_18_21>;
+};
+
+spi0_pins: &rp1_spi0_gpio9 {};
+spi0_cs_pins: &rp1_spi0_cs_gpio7 {};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
+
+ spidev0: spidev@0 {
+ compatible = "spidev";
+ reg = <0>; /* CE0 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <125000000>;
+ };
+
+ spidev1: spidev@1 {
+ compatible = "spidev";
+ reg = <1>; /* CE1 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <125000000>;
+ };
+};
+
+spi2_pins: &rp1_spi2_gpio1 {};
+&spi2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2_pins>;
+};
+
+spi3_pins: &rp1_spi3_gpio5 {};
+&spi3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi3_pins>;
+};
+
+spi4_pins: &rp1_spi4_gpio9 {};
+&spi4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi4_pins>;
+};
+
+spi5_pins: &rp1_spi5_gpio13 {};
+&spi5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi5_pins>;
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
index 205b87f557d6..18c60815fb08 100644
--- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
@@ -303,21 +303,6 @@
*/
};
- sdio2: mmc@1100000 {
- compatible = "brcm,bcm2712-sdhci",
- "brcm,sdhci-brcmstb";
- reg = <0x01100000 0x260>,
- <0x01100400 0x200>;
- reg-names = "host", "cfg";
- interrupts = <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_emmc2>;
- clock-names = "sw_sdio";
- sdhci-caps-mask = <0x0000C000 0x0>;
- sdhci-caps = <0x0 0x0>;
- mmc-ddr-3_3v;
- status = "disabled";
- };
-
gicv2: interrupt-controller@7fff9000 {
compatible = "arm,gic-400";
reg = <0x7fff9000 0x1000>,
@@ -663,9 +648,14 @@
hvs: hvs@107c580000 {
compatible = "brcm,bcm2712-hvs";
+#ifndef FIRMWARE_UPDATED
+ reg = <0x10 0x7c580000 0x1a000>;
+#else
reg = <0x10 0x7c580000 0x0 0x1a000>;
+#endif
interrupt-parent = <&disp_intr>;
interrupts = <2>, <9>, <16>;
interrupt-names = "ch0-eof", "ch1-eof", "ch2-eof";
+ iommus = <&iommu4>;
};
};
diff --git a/arch/arm64/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts b/arch/arm64/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts
new file mode 100644
index 000000000000..d06536bc7592
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts
@@ -0,0 +1,107 @@
+// SPDX-License-Identifier: GPL-2.0
+#include "bcm2712-rpi-5-b.dts"
+
+&gio {
+ brcm,gpio-bank-widths = <32 4>;
+
+ gpio-line-names =
+ "", // GPIO_000
+ "2712_BOOT_CS_N", // GPIO_001
+ "2712_BOOT_MISO", // GPIO_002
+ "2712_BOOT_MOSI", // GPIO_003
+ "2712_BOOT_SCLK", // GPIO_004
+ "", // GPIO_005
+ "", // GPIO_006
+ "", // GPIO_007
+ "", // GPIO_008
+ "", // GPIO_009
+ "-", // GPIO_010
+ "-", // GPIO_011
+ "-", // GPIO_012
+ "-", // GPIO_013
+ "PCIE_SDA", // GPIO_014
+ "PCIE_SCL", // GPIO_015
+ "", // GPIO_016
+ "", // GPIO_017
+ "-", // GPIO_018
+ "-", // GPIO_019
+ "PWR_GPIO", // GPIO_020
+ "2712_G21_FS", // GPIO_021
+ "-", // GPIO_022
+ "-", // GPIO_023
+ "BT_RTS", // GPIO_024
+ "BT_CTS", // GPIO_025
+ "BT_TXD", // GPIO_026
+ "BT_RXD", // GPIO_027
+ "WL_ON", // GPIO_028
+ "BT_ON", // GPIO_029
+ "WIFI_SDIO_CLK", // GPIO_030
+ "WIFI_SDIO_CMD", // GPIO_031
+ "WIFI_SDIO_D0", // GPIO_032
+ "WIFI_SDIO_D1", // GPIO_033
+ "WIFI_SDIO_D2", // GPIO_034
+ "WIFI_SDIO_D3"; // GPIO_035
+};
+
+&gio_aon {
+ brcm,gpio-bank-widths = <15 6>;
+
+ gpio-line-names =
+ "RP1_SDA", // AON_GPIO_00
+ "RP1_SCL", // AON_GPIO_01
+ "RP1_RUN", // AON_GPIO_02
+ "SD_IOVDD_SEL", // AON_GPIO_03
+ "SD_PWR_ON", // AON_GPIO_04
+ "SD_CDET_N", // AON_GPIO_05
+ "SD_FLG_N", // AON_GPIO_06
+ "", // AON_GPIO_07
+ "2712_WAKE", // AON_GPIO_08
+ "2712_STAT_LED", // AON_GPIO_09
+ "", // AON_GPIO_10
+ "", // AON_GPIO_11
+ "PMIC_INT", // AON_GPIO_12
+ "UART_TX_FS", // AON_GPIO_13
+ "UART_RX_FS", // AON_GPIO_14
+ "", // AON_GPIO_15
+ "", // AON_GPIO_16
+
+ // Pad bank0 out to 32 entries
+ "", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
+
+ "HDMI0_SCL", // AON_SGPIO_00
+ "HDMI0_SDA", // AON_SGPIO_01
+ "HDMI1_SCL", // AON_SGPIO_02
+ "HDMI1_SDA", // AON_SGPIO_03
+ "PMIC_SCL", // AON_SGPIO_04
+ "PMIC_SDA"; // AON_SGPIO_05
+};
+
+&pinctrl {
+ compatible = "brcm,bcm2712d0-pinctrl";
+ reg = <0x7d504100 0x20>;
+};
+
+&pinctrl_aon {
+ compatible = "brcm,bcm2712d0-aon-pinctrl";
+ reg = <0x7d510700 0x1c>;
+};
+
+&vc4 {
+ compatible = "brcm,bcm2712d0-vc6", "brcm,bcm2712-vc6";
+};
+
+&uart10 {
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&spi10 {
+ dmas = <&dma40 3>, <&dma40 4>;
+};
+
+&hdmi0 {
+ dmas = <&dma40 (12|(1<<30)|(1<<24)|(10<<16)|(15<<20))>;
+};
+
+&hdmi1 {
+ dmas = <&dma40 (13|(1<<30)|(1<<24)|(10<<16)|(15<<20))>;
+};
diff --git a/arch/arm64/boot/dts/broadcom/rp1.dtsi b/arch/arm64/boot/dts/broadcom/rp1.dtsi
new file mode 100644
index 000000000000..15e770a63c55
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/rp1.dtsi
@@ -0,0 +1,1323 @@
+#include <dt-bindings/clock/rp1.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/mfd/rp1.h>
+
+&rp1_target {
+ rp1: rp1 {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ interrupt-parent = <&rp1>;
+
+ // ranges and dma-ranges must be provided by the includer
+
+ rp1_mbox: mailbox@8000 {
+ compatible = "raspberrypi,rp1-mbox";
+ status = "disabled";
+ reg = <0xc0 0x40008000 0x0 0x4000>; // SYSCFG
+ interrupts = <RP1_INT_SYSCFG IRQ_TYPE_LEVEL_HIGH>;
+ #mbox-cells = <1>;
+ };
+
+ rp1_clocks: clocks@18000 {
+ compatible = "raspberrypi,rp1-clocks";
+ #clock-cells = <1>;
+ reg = <0xc0 0x40018000 0x0 0x10038>;
+ clocks = <&clk_xosc>;
+
+ assigned-clocks = <&rp1_clocks RP1_PLL_SYS_CORE>,
+ <&rp1_clocks RP1_PLL_AUDIO_CORE>,
+ // RP1_PLL_VIDEO_CORE and dividers are now managed by VEC,DPI drivers
+ <&rp1_clocks RP1_PLL_SYS>,
+ <&rp1_clocks RP1_PLL_SYS_SEC>,
+ <&rp1_clocks RP1_CLK_ETH>,
+ <&rp1_clocks RP1_PLL_AUDIO>,
+ <&rp1_clocks RP1_PLL_AUDIO_SEC>,
+ <&rp1_clocks RP1_CLK_SYS>,
+ <&rp1_clocks RP1_PLL_SYS_PRI_PH>,
+ // RP1_CLK_SLOW_SYS is used for the frequency counter (FC0)
+ <&rp1_clocks RP1_CLK_SLOW_SYS>,
+ <&rp1_clocks RP1_CLK_SDIO_TIMER>,
+ <&rp1_clocks RP1_CLK_SDIO_ALT_SRC>,
+ <&rp1_clocks RP1_CLK_ETH_TSU>;
+
+ assigned-clock-rates = <1000000000>, // RP1_PLL_SYS_CORE
+ <1536000000>, // RP1_PLL_AUDIO_CORE
+ <200000000>, // RP1_PLL_SYS
+ <125000000>, // RP1_PLL_SYS_SEC
+ <125000000>, // RP1_CLK_ETH
+ <61440000>, // RP1_PLL_AUDIO
+ <192000000>, // RP1_PLL_AUDIO_SEC
+ <200000000>, // RP1_CLK_SYS
+ <100000000>, // RP1_PLL_SYS_PRI_PH
+ // Must match the XOSC frequency
+ <50000000>, // RP1_CLK_SLOW_SYS
+ <1000000>, // RP1_CLK_SDIO_TIMER
+ <200000000>, // RP1_CLK_SDIO_ALT_SRC
+ <50000000>; // RP1_CLK_ETH_TSU
+ };
+
+ rp1_uart0: serial@30000 {
+ compatible = "arm,pl011-axi";
+ reg = <0xc0 0x40030000 0x0 0x100>;
+ interrupts = <RP1_INT_UART0 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
+ clock-names = "uartclk", "apb_pclk";
+ dmas = <&rp1_dma RP1_DMA_UART0_TX>,
+ <&rp1_dma RP1_DMA_UART0_RX>;
+ dma-names = "tx", "rx";
+ pinctrl-names = "default";
+ arm,primecell-periphid = <0x00341011>;
+ uart-has-rtscts;
+ cts-event-workaround;
+ skip-init;
+ status = "disabled";
+ };
+
+ rp1_uart1: serial@34000 {
+ compatible = "arm,pl011-axi";
+ reg = <0xc0 0x40034000 0x0 0x100>;
+ interrupts = <RP1_INT_UART1 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
+ clock-names = "uartclk", "apb_pclk";
+ // dmas = <&rp1_dma RP1_DMA_UART1_TX>,
+ // <&rp1_dma RP1_DMA_UART1_RX>;
+ // dma-names = "tx", "rx";
+ pinctrl-names = "default";
+ arm,primecell-periphid = <0x00341011>;
+ uart-has-rtscts;
+ cts-event-workaround;
+ skip-init;
+ status = "disabled";
+ };
+
+ rp1_uart2: serial@38000 {
+ compatible = "arm,pl011-axi";
+ reg = <0xc0 0x40038000 0x0 0x100>;
+ interrupts = <RP1_INT_UART2 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
+ clock-names = "uartclk", "apb_pclk";
+ // dmas = <&rp1_dma RP1_DMA_UART2_TX>,
+ // <&rp1_dma RP1_DMA_UART2_RX>;
+ // dma-names = "tx", "rx";
+ pinctrl-names = "default";
+ arm,primecell-periphid = <0x00341011>;
+ uart-has-rtscts;
+ cts-event-workaround;
+ skip-init;
+ status = "disabled";
+ };
+
+ rp1_uart3: serial@3c000 {
+ compatible = "arm,pl011-axi";
+ reg = <0xc0 0x4003c000 0x0 0x100>;
+ interrupts = <RP1_INT_UART3 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
+ clock-names = "uartclk", "apb_pclk";
+ // dmas = <&rp1_dma RP1_DMA_UART3_TX>,
+ // <&rp1_dma RP1_DMA_UART3_RX>;
+ // dma-names = "tx", "rx";
+ pinctrl-names = "default";
+ arm,primecell-periphid = <0x00341011>;
+ uart-has-rtscts;
+ cts-event-workaround;
+ skip-init;
+ status = "disabled";
+ };
+
+ rp1_uart4: serial@40000 {
+ compatible = "arm,pl011-axi";
+ reg = <0xc0 0x40040000 0x0 0x100>;
+ interrupts = <RP1_INT_UART4 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
+ clock-names = "uartclk", "apb_pclk";
+ // dmas = <&rp1_dma RP1_DMA_UART4_TX>,
+ // <&rp1_dma RP1_DMA_UART4_RX>;
+ // dma-names = "tx", "rx";
+ pinctrl-names = "default";
+ arm,primecell-periphid = <0x00341011>;
+ uart-has-rtscts;
+ cts-event-workaround;
+ skip-init;
+ status = "disabled";
+ };
+
+ rp1_uart5: serial@44000 {
+ compatible = "arm,pl011-axi";
+ reg = <0xc0 0x40044000 0x0 0x100>;
+ interrupts = <RP1_INT_UART5 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
+ clock-names = "uartclk", "apb_pclk";
+ // dmas = <&rp1_dma RP1_DMA_UART5_TX>,
+ // <&rp1_dma RP1_DMA_UART5_RX>;
+ // dma-names = "tx", "rx";
+ pinctrl-names = "default";
+ arm,primecell-periphid = <0x00341011>;
+ uart-has-rtscts;
+ cts-event-workaround;
+ skip-init;
+ status = "disabled";
+ };
+
+ rp1_spi8: spi@4c000 {
+ reg = <0xc0 0x4004c000 0x0 0x130>;
+ compatible = "snps,dw-apb-ssi";
+ interrupts = <RP1_INT_SPI8 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
+ clock-names = "ssi_clk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ num-cs = <2>;
+ dmas = <&rp1_dma RP1_DMA_SPI8_TX>,
+ <&rp1_dma RP1_DMA_SPI8_RX>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ rp1_spi0: spi@50000 {
+ reg = <0xc0 0x40050000 0x0 0x130>;
+ compatible = "snps,dw-apb-ssi";
+ interrupts = <RP1_INT_SPI0 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
+ clock-names = "ssi_clk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ num-cs = <2>;
+ dmas = <&rp1_dma RP1_DMA_SPI0_TX>,
+ <&rp1_dma RP1_DMA_SPI0_RX>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ rp1_spi1: spi@54000 {
+ reg = <0xc0 0x40054000 0x0 0x130>;
+ compatible = "snps,dw-apb-ssi";
+ interrupts = <RP1_INT_SPI1 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
+ clock-names = "ssi_clk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ num-cs = <2>;
+ dmas = <&rp1_dma RP1_DMA_SPI1_TX>,
+ <&rp1_dma RP1_DMA_SPI1_RX>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ rp1_spi2: spi@58000 {
+ reg = <0xc0 0x40058000 0x0 0x130>;
+ compatible = "snps,dw-apb-ssi";
+ interrupts = <RP1_INT_SPI2 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
+ clock-names = "ssi_clk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ num-cs = <2>;
+ dmas = <&rp1_dma RP1_DMA_SPI2_TX>,
+ <&rp1_dma RP1_DMA_SPI2_RX>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ rp1_spi3: spi@5c000 {
+ reg = <0xc0 0x4005c000 0x0 0x130>;
+ compatible = "snps,dw-apb-ssi";
+ interrupts = <RP1_INT_SPI3 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
+ clock-names = "ssi_clk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ num-cs = <2>;
+ dmas = <&rp1_dma RP1_DMA_SPI3_TX>,
+ <&rp1_dma RP1_DMA_SPI3_RX>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ // SPI4 is a target/slave interface
+ rp1_spi4: spi@60000 {
+ reg = <0xc0 0x40060000 0x0 0x130>;
+ compatible = "snps,dw-apb-ssi";
+ interrupts = <RP1_INT_SPI4 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
+ clock-names = "ssi_clk";
+ #address-cells = <0>;
+ #size-cells = <0>;
+ num-cs = <1>;
+ spi-slave;
+ dmas = <&rp1_dma RP1_DMA_SPI4_TX>,
+ <&rp1_dma RP1_DMA_SPI4_RX>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+
+ slave {
+ compatible = "spidev";
+ spi-max-frequency = <1000000>;
+ };
+ };
+
+ rp1_spi5: spi@64000 {
+ reg = <0xc0 0x40064000 0x0 0x130>;
+ compatible = "snps,dw-apb-ssi";
+ interrupts = <RP1_INT_SPI5 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
+ clock-names = "ssi_clk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ num-cs = <2>;
+ dmas = <&rp1_dma RP1_DMA_SPI5_TX>,
+ <&rp1_dma RP1_DMA_SPI5_RX>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ rp1_spi6: spi@68000 {
+ reg = <0xc0 0x40068000 0x0 0x130>;
+ compatible = "snps,dw-apb-ssi";
+ interrupts = <RP1_INT_SPI6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
+ clock-names = "ssi_clk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ num-cs = <2>;
+ dmas = <&rp1_dma RP1_DMA_SPI6_TX>,
+ <&rp1_dma RP1_DMA_SPI6_RX>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ // SPI7 is a target/slave interface
+ rp1_spi7: spi@6c000 {
+ reg = <0xc0 0x4006c000 0x0 0x130>;
+ compatible = "snps,dw-apb-ssi";
+ interrupts = <RP1_INT_SPI7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
+ clock-names = "ssi_clk";
+ #address-cells = <0>;
+ #size-cells = <0>;
+ num-cs = <1>;
+ spi-slave;
+ dmas = <&rp1_dma RP1_DMA_SPI7_TX>,
+ <&rp1_dma RP1_DMA_SPI7_RX>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+
+ slave {
+ compatible = "spidev";
+ spi-max-frequency = <1000000>;
+ };
+ };
+
+ rp1_i2c0: i2c@70000 {
+ reg = <0xc0 0x40070000 0x0 0x1000>;
+ compatible = "snps,designware-i2c";
+ interrupts = <RP1_INT_I2C0 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
+ i2c-scl-rising-time-ns = <65>;
+ i2c-scl-falling-time-ns = <100>;
+ status = "disabled";
+ };
+
+ rp1_i2c1: i2c@74000 {
+ reg = <0xc0 0x40074000 0x0 0x1000>;
+ compatible = "snps,designware-i2c";
+ interrupts = <RP1_INT_I2C1 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
+ i2c-scl-rising-time-ns = <65>;
+ i2c-scl-falling-time-ns = <100>;
+ status = "disabled";
+ };
+
+ rp1_i2c2: i2c@78000 {
+ reg = <0xc0 0x40078000 0x0 0x1000>;
+ compatible = "snps,designware-i2c";
+ interrupts = <RP1_INT_I2C2 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
+ i2c-scl-rising-time-ns = <65>;
+ i2c-scl-falling-time-ns = <100>;
+ status = "disabled";
+ };
+
+ rp1_i2c3: i2c@7c000 {
+ reg = <0xc0 0x4007c000 0x0 0x1000>;
+ compatible = "snps,designware-i2c";
+ interrupts = <RP1_INT_I2C3 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
+ i2c-scl-rising-time-ns = <65>;
+ i2c-scl-falling-time-ns = <100>;
+ status = "disabled";
+ };
+
+ rp1_i2c4: i2c@80000 {
+ reg = <0xc0 0x40080000 0x0 0x1000>;
+ compatible = "snps,designware-i2c";
+ interrupts = <RP1_INT_I2C4 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
+ i2c-scl-rising-time-ns = <65>;
+ i2c-scl-falling-time-ns = <100>;
+ status = "disabled";
+ };
+
+ rp1_i2c5: i2c@84000 {
+ reg = <0xc0 0x40084000 0x0 0x1000>;
+ compatible = "snps,designware-i2c";
+ interrupts = <RP1_INT_I2C5 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
+ i2c-scl-rising-time-ns = <65>;
+ i2c-scl-falling-time-ns = <100>;
+ status = "disabled";
+ };
+
+ rp1_i2c6: i2c@88000 {
+ reg = <0xc0 0x40088000 0x0 0x1000>;
+ compatible = "snps,designware-i2c";
+ interrupts = <RP1_INT_I2C6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
+ i2c-scl-rising-time-ns = <65>;
+ i2c-scl-falling-time-ns = <100>;
+ status = "disabled";
+ };
+
+ rp1_pwm0: pwm@98000 {
+ compatible = "raspberrypi,rp1-pwm";
+ reg = <0xc0 0x40098000 0x0 0x100>;
+ #pwm-cells = <3>;
+ clocks = <&rp1_clocks RP1_CLK_PWM0>;
+ assigned-clocks = <&rp1_clocks RP1_CLK_PWM0>;
+ assigned-clock-rates = <50000000>;
+ status = "disabled";
+ };
+
+ rp1_pwm1: pwm@9c000 {
+ compatible = "raspberrypi,rp1-pwm";
+ reg = <0xc0 0x4009c000 0x0 0x100>;
+ #pwm-cells = <3>;
+ clocks = <&rp1_clocks RP1_CLK_PWM1>;
+ assigned-clocks = <&rp1_clocks RP1_CLK_PWM1>;
+ assigned-clock-rates = <50000000>;
+ status = "disabled";
+ };
+
+ rp1_i2s0: i2s@a0000 {
+ reg = <0xc0 0x400a0000 0x0 0x1000>;
+ compatible = "snps,designware-i2s";
+ // Providing an interrupt disables DMA
+ // interrupts = <RP1_INT_I2S0 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_I2S>;
+ clock-names = "i2sclk";
+ #sound-dai-cells = <0>;
+ dmas = <&rp1_dma RP1_DMA_I2S0_TX>,<&rp1_dma RP1_DMA_I2S0_RX>;
+ dma-names = "tx", "rx";
+ dma-maxburst = <4>;
+ status = "disabled";
+ };
+
+ rp1_i2s1: i2s@a4000 {
+ reg = <0xc0 0x400a4000 0x0 0x1000>;
+ compatible = "snps,designware-i2s";
+ // Providing an interrupt disables DMA
+ // interrupts = <RP1_INT_I2S1 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_I2S>;
+ clock-names = "i2sclk";
+ #sound-dai-cells = <0>;
+ dmas = <&rp1_dma RP1_DMA_I2S1_TX>,<&rp1_dma RP1_DMA_I2S1_RX>;
+ dma-names = "tx", "rx";
+ dma-maxburst = <4>;
+ status = "disabled";
+ };
+
+ rp1_i2s2: i2s@a8000 {
+ reg = <0xc0 0x400a8000 0x0 0x1000>;
+ compatible = "snps,designware-i2s";
+ // Providing an interrupt disables DMA
+ // interrupts = <RP1_INT_I2S2 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_I2S>;
+ status = "disabled";
+ };
+
+ rp1_sdio_clk0: sdio_clk0@b0004 {
+ compatible = "raspberrypi,rp1-sdio-clk";
+ reg = <0xc0 0x400b0004 0x0 0x1c>;
+ clocks = <&sdio_src &sdhci_core>;
+ clock-names = "src", "base";
+ #clock-cells = <0>;
+ status = "disabled";
+ };
+
+ rp1_sdio_clk1: sdio_clk1@b4004 {
+ compatible = "raspberrypi,rp1-sdio-clk";
+ reg = <0xc0 0x400b4004 0x0 0x1c>;
+ clocks = <&sdio_src &sdhci_core>;
+ clock-names = "src", "base";
+ #clock-cells = <0>;
+ status = "disabled";
+ };
+
+ rp1_adc: adc@c8000 {
+ compatible = "raspberrypi,rp1-adc";
+ reg = <0xc0 0x400c8000 0x0 0x4000>;
+ clocks = <&rp1_clocks RP1_CLK_ADC>;
+ clock-names = "adcclk";
+ #clock-cells = <0>;
+ vref-supply = <&rp1_vdd_3v3>;
+ status = "disabled";
+ };
+
+ rp1_gpio: gpio@d0000 {
+ reg = <0xc0 0x400d0000 0x0 0xc000>,
+ <0xc0 0x400e0000 0x0 0xc000>,
+ <0xc0 0x400f0000 0x0 0xc000>;
+ compatible = "raspberrypi,rp1-gpio";
+ interrupts = <RP1_INT_IO_BANK0 IRQ_TYPE_LEVEL_HIGH>,
+ <RP1_INT_IO_BANK1 IRQ_TYPE_LEVEL_HIGH>,
+ <RP1_INT_IO_BANK2 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-ranges = <&rp1_gpio 0 0 54>;
+
+ rp1_uart0_14_15: rp1_uart0_14_15 {
+ pin_txd {
+ function = "uart0";
+ pins = "gpio14";
+ bias-disable;
+ };
+ pin_rxd {
+ function = "uart0";
+ pins = "gpio15";
+ bias-pull-up;
+ };
+ };
+ rp1_uart0_ctsrts_16_17: rp1_uart0_ctsrts_16_17 {
+ pin_cts {
+ function = "uart0";
+ pins = "gpio16";
+ bias-pull-up;
+ };
+ pin_rts {
+ function = "uart0";
+ pins = "gpio17";
+ bias-disable;
+ };
+ };
+ rp1_uart1_0_1: rp1_uart1_0_1 {
+ pin_txd {
+ function = "uart1";
+ pins = "gpio0";
+ bias-disable;
+ };
+ pin_rxd {
+ function = "uart1";
+ pins = "gpio1";
+ bias-pull-up;
+ };
+ };
+ rp1_uart1_ctsrts_2_3: rp1_uart1_ctsrts_2_3 {
+ pin_cts {
+ function = "uart1";
+ pins = "gpio2";
+ bias-pull-up;
+ };
+ pin_rts {
+ function = "uart1";
+ pins = "gpio3";
+ bias-disable;
+ };
+ };
+ rp1_uart2_4_5: rp1_uart2_4_5 {
+ pin_txd {
+ function = "uart2";
+ pins = "gpio4";
+ bias-disable;
+ };
+ pin_rxd {
+ function = "uart2";
+ pins = "gpio5";
+ bias-pull-up;
+ };
+ };
+ rp1_uart2_ctsrts_6_7: rp1_uart2_ctsrts_6_7 {
+ pin_cts {
+ function = "uart2";
+ pins = "gpio6";
+ bias-pull-up;
+ };
+ pin_rts {
+ function = "uart2";
+ pins = "gpio7";
+ bias-disable;
+ };
+ };
+ rp1_uart3_8_9: rp1_uart3_8_9 {
+ pin_txd {
+ function = "uart3";
+ pins = "gpio8";
+ bias-disable;
+ };
+ pin_rxd {
+ function = "uart3";
+ pins = "gpio9";
+ bias-pull-up;
+ };
+ };
+ rp1_uart3_ctsrts_10_11: rp1_uart3_ctsrts_10_11 {
+ pin_cts {
+ function = "uart3";
+ pins = "gpio10";
+ bias-pull-up;
+ };
+ pin_rts {
+ function = "uart3";
+ pins = "gpio11";
+ bias-disable;
+ };
+ };
+ rp1_uart4_12_13: rp1_uart4_12_13 {
+ pin_txd {
+ function = "uart4";
+ pins = "gpio12";
+ bias-disable;
+ };
+ pin_rxd {
+ function = "uart4";
+ pins = "gpio13";
+ bias-pull-up;
+ };
+ };
+ rp1_uart4_ctsrts_14_15: rp1_uart4_ctsrts_14_15 {
+ pin_cts {
+ function = "uart4";
+ pins = "gpio14";
+ bias-pull-up;
+ };
+ pin_rts {
+ function = "uart4";
+ pins = "gpio15";
+ bias-disable;
+ };
+ };
+
+ rp1_sdio0_22_27: rp1_sdio0_22_27 {
+ pin_clk {
+ function = "sd0";
+ pins = "gpio22";
+ bias-disable;
+ drive-strength = <12>;
+ slew-rate = <1>;
+ };
+ pin_cmd {
+ function = "sd0";
+ pins = "gpio23";
+ bias-pull-up;
+ drive-strength = <12>;
+ slew-rate = <1>;
+ };
+ pins_dat {
+ function = "sd0";
+ pins = "gpio24", "gpio25", "gpio26", "gpio27";
+ bias-pull-up;
+ drive-strength = <12>;
+ slew-rate = <1>;
+ };
+ };
+
+ rp1_sdio1_28_33: rp1_sdio1_28_33 {
+ pin_clk {
+ function = "sd1";
+ pins = "gpio28";
+ bias-disable;
+ drive-strength = <12>;
+ slew-rate = <1>;
+ };
+ pin_cmd {
+ function = "sd1";
+ pins = "gpio29";
+ bias-pull-up;
+ drive-strength = <12>;
+ slew-rate = <1>;
+ };
+ pins_dat {
+ function = "sd1";
+ pins = "gpio30", "gpio31", "gpio32", "gpio33";
+ bias-pull-up;
+ drive-strength = <12>;
+ slew-rate = <1>;
+ };
+ };
+
+ rp1_i2s0_18_21: rp1_i2s0_18_21 {
+ function = "i2s0";
+ pins = "gpio18", "gpio19", "gpio20", "gpio21";
+ bias-disable;
+ };
+
+ rp1_i2s1_18_21: rp1_i2s1_18_21 {
+ function = "i2s1";
+ pins = "gpio18", "gpio19", "gpio20", "gpio21";
+ bias-disable;
+ };
+
+ rp1_i2c4_34_35: rp1_i2c4_34_35 {
+ function = "i2c4";
+ pins = "gpio34", "gpio35";
+ drive-strength = <12>;
+ bias-pull-up;
+ };
+ rp1_i2c6_38_39: rp1_i2c6_38_39 {
+ function = "i2c6";
+ pins = "gpio38", "gpio39";
+ drive-strength = <12>;
+ bias-pull-up;
+ };
+ rp1_i2c4_40_41: rp1_i2c4_40_41 {
+ function = "i2c4";
+ pins = "gpio40", "gpio41";
+ drive-strength = <12>;
+ bias-pull-up;
+ };
+ rp1_i2c5_44_45: rp1_i2c5_44_45 {
+ function = "i2c5";
+ pins = "gpio44", "gpio45";
+ drive-strength = <12>;
+ bias-pull-up;
+ };
+ rp1_i2c0_0_1: rp1_i2c0_0_1 {
+ function = "i2c0";
+ pins = "gpio0", "gpio1";
+ drive-strength = <12>;
+ bias-pull-up;
+ };
+ rp1_i2c0_8_9: rp1_i2c0_8_9 {
+ function = "i2c0";
+ pins = "gpio8", "gpio9";
+ drive-strength = <12>;
+ bias-pull-up;
+ };
+ rp1_i2c1_2_3: rp1_i2c1_2_3 {
+ function = "i2c1";
+ pins = "gpio2", "gpio3";
+ drive-strength = <12>;
+ bias-pull-up;
+ };
+ rp1_i2c1_10_11: rp1_i2c1_10_11 {
+ function = "i2c1";
+ pins = "gpio10", "gpio11";
+ drive-strength = <12>;
+ bias-pull-up;
+ };
+ rp1_i2c2_4_5: rp1_i2c2_4_5 {
+ function = "i2c2";
+ pins = "gpio4", "gpio5";
+ drive-strength = <12>;
+ bias-pull-up;
+ };
+ rp1_i2c2_12_13: rp1_i2c2_12_13 {
+ function = "i2c2";
+ pins = "gpio12", "gpio13";
+ drive-strength = <12>;
+ bias-pull-up;
+ };
+ rp1_i2c3_6_7: rp1_i2c3_6_7 {
+ function = "i2c3";
+ pins = "gpio6", "gpio7";
+ drive-strength = <12>;
+ bias-pull-up;
+ };
+ rp1_i2c3_14_15: rp1_i2c3_14_15 {
+ function = "i2c3";
+ pins = "gpio14", "gpio15";
+ drive-strength = <12>;
+ bias-pull-up;
+ };
+ rp1_i2c3_22_23: rp1_i2c3_22_23 {
+ function = "i2c3";
+ pins = "gpio22", "gpio23";
+ drive-strength = <12>;
+ bias-pull-up;
+ };
+
+ // DPI mappings with HSYNC,VSYNC but without PIXCLK,DE
+ rp1_dpi_16bit_gpio2: rp1_dpi_16bit_gpio2 { /* Mode 2, not fully supported by RP1 */
+ function = "dpi";
+ pins = "gpio2", "gpio3", "gpio4", "gpio5",
+ "gpio6", "gpio7", "gpio8", "gpio9",
+ "gpio10", "gpio11", "gpio12", "gpio13",
+ "gpio14", "gpio15", "gpio16", "gpio17",
+ "gpio18", "gpio19";
+ bias-disable;
+ };
+ rp1_dpi_16bit_cpadhi_gpio2: rp1_dpi_16bit_cpadhi_gpio2 { /* Mode 3 */
+ function = "dpi";
+ pins = "gpio2", "gpio3", "gpio4", "gpio5",
+ "gpio6", "gpio7", "gpio8",
+ "gpio12", "gpio13", "gpio14", "gpio15",
+ "gpio16", "gpio17",
+ "gpio20", "gpio21", "gpio22", "gpio23",
+ "gpio24";
+ bias-disable;
+ };
+ rp1_dpi_16bit_pad666_gpio2: rp1_dpi_16bit_pad666_gpio2 { /* Mode 4 */
+ function = "dpi";
+ pins = "gpio2", "gpio3",
+ "gpio5", "gpio6", "gpio7", "gpio8",
+ "gpio9",
+ "gpio12", "gpio13", "gpio14", "gpio15",
+ "gpio16", "gpio17",
+ "gpio21", "gpio22", "gpio23", "gpio24",
+ "gpio25";
+ bias-disable;
+ };
+ rp1_dpi_18bit_gpio2: rp1_dpi_18bit_gpio2 { /* Mode 5, not fully supported by RP1 */
+ function = "dpi";
+ pins = "gpio2", "gpio3", "gpio4", "gpio5",
+ "gpio6", "gpio7", "gpio8", "gpio9",
+ "gpio10", "gpio11", "gpio12", "gpio13",
+ "gpio14", "gpio15", "gpio16", "gpio17",
+ "gpio18", "gpio19", "gpio20", "gpio21";
+ bias-disable;
+ };
+ rp1_dpi_18bit_cpadhi_gpio2: rp1_dpi_18bit_cpadhi_gpio2 { /* Mode 6 */
+ function = "dpi";
+ pins = "gpio2", "gpio3", "gpio4", "gpio5",
+ "gpio6", "gpio7", "gpio8", "gpio9",
+ "gpio12", "gpio13", "gpio14", "gpio15",
+ "gpio16", "gpio17",
+ "gpio20", "gpio21", "gpio22", "gpio23",
+ "gpio24", "gpio25";
+ bias-disable;
+ };
+ rp1_dpi_24bit_gpio2: rp1_dpi_24bit_gpio2 { /* Mode 7 */
+ function = "dpi";
+ pins = "gpio2", "gpio3", "gpio4", "gpio5",
+ "gpio6", "gpio7", "gpio8", "gpio9",
+ "gpio10", "gpio11", "gpio12", "gpio13",
+ "gpio14", "gpio15", "gpio16", "gpio17",
+ "gpio18", "gpio19", "gpio20", "gpio21",
+ "gpio22", "gpio23", "gpio24", "gpio25",
+ "gpio26", "gpio27";
+ bias-disable;
+ };
+ rp1_dpi_hvsync: rp1_dpi_hvsync { /* Sync only, for use with int VDAC */
+ function = "dpi";
+ pins = "gpio2", "gpio3";
+ bias-disable;
+ };
+
+ // More DPI mappings, including PIXCLK,DE on GPIOs 0,1
+ rp1_dpi_16bit_gpio0: rp1_dpi_16bit_gpio0 { /* Mode 2, not fully supported by RP1 */
+ function = "dpi";
+ pins = "gpio0", "gpio1", "gpio2", "gpio3",
+ "gpio4", "gpio5", "gpio6", "gpio7",
+ "gpio8", "gpio9", "gpio10", "gpio11",
+ "gpio12", "gpio13", "gpio14", "gpio15",
+ "gpio16", "gpio17", "gpio18", "gpio19";
+ bias-disable;
+ };
+ rp1_dpi_16bit_cpadhi_gpio0: rp1_dpi_16bit_cpadhi_gpio0 { /* Mode 3 */
+ function = "dpi";
+ pins = "gpio0", "gpio1", "gpio2", "gpio3",
+ "gpio4", "gpio5", "gpio6", "gpio7",
+ "gpio8",
+ "gpio12", "gpio13", "gpio14", "gpio15",
+ "gpio16", "gpio17",
+ "gpio20", "gpio21", "gpio22", "gpio23",
+ "gpio24";
+ bias-disable;
+ };
+ rp1_dpi_16bit_pad666_gpio0: rp1_dpi_16bit_pad666_gpio0 { /* Mode 4 */
+ function = "dpi";
+ pins = "gpio0", "gpio1", "gpio2", "gpio3",
+ "gpio5", "gpio6", "gpio7", "gpio8",
+ "gpio9",
+ "gpio12", "gpio13", "gpio14", "gpio15",
+ "gpio16", "gpio17",
+ "gpio21", "gpio22", "gpio23", "gpio24",
+ "gpio25";
+ bias-disable;
+ };
+ rp1_dpi_18bit_gpio0: rp1_dpi_18bit_gpio0 { /* Mode 5, not fully supported by RP1 */
+ function = "dpi";
+ pins = "gpio0", "gpio1", "gpio2", "gpio3",
+ "gpio4", "gpio5", "gpio6", "gpio7",
+ "gpio8", "gpio9", "gpio10", "gpio11",
+ "gpio12", "gpio13", "gpio14", "gpio15",
+ "gpio16", "gpio17", "gpio18", "gpio19",
+ "gpio20", "gpio21";
+ bias-disable;
+ };
+ rp1_dpi_18bit_cpadhi_gpio0: rp1_dpi_18bit_cpadhi_gpio0 { /* Mode 6 */
+ function = "dpi";
+ pins = "gpio0", "gpio1", "gpio2", "gpio3",
+ "gpio4", "gpio5", "gpio6", "gpio7",
+ "gpio8", "gpio9",
+ "gpio12", "gpio13", "gpio14", "gpio15",
+ "gpio16", "gpio17",
+ "gpio20", "gpio21", "gpio22", "gpio23",
+ "gpio24", "gpio25";
+ bias-disable;
+ };
+ rp1_dpi_24bit_gpio0: rp1_dpi_24bit_gpio0 { /* Mode 7 -- All GPIOs used! */
+ function = "dpi";
+ pins = "gpio0", "gpio1", "gpio2", "gpio3",
+ "gpio4", "gpio5", "gpio6", "gpio7",
+ "gpio8", "gpio9", "gpio10", "gpio11",
+ "gpio12", "gpio13", "gpio14", "gpio15",
+ "gpio16", "gpio17", "gpio18", "gpio19",
+ "gpio20", "gpio21", "gpio22", "gpio23",
+ "gpio24", "gpio25", "gpio26", "gpio27";
+ bias-disable;
+ };
+
+ rp1_gpclksrc0_gpio4: rp1_gpclksrc0_gpio4 {
+ function = "gpclk0";
+ pins = "gpio4";
+ bias-disable;
+ };
+
+ rp1_gpclksrc0_gpio20: rp1_gpclksrc0_gpio20 {
+ function = "gpclk0";
+ pins = "gpio20";
+ bias-disable;
+ };
+
+ rp1_gpclksrc1_gpio5: rp1_gpclksrc1_gpio5 {
+ function = "gpclk1";
+ pins = "gpio5";
+ bias-disable;
+ };
+
+ rp1_gpclksrc1_gpio18: rp1_gpclksrc1_gpio18 {
+ function = "gpclk1";
+ pins = "gpio18";
+ bias-disable;
+ };
+
+ rp1_gpclksrc1_gpio21: rp1_gpclksrc1_gpio21 {
+ function = "gpclk1";
+ pins = "gpio21";
+ bias-disable;
+ };
+
+ rp1_pwm1_gpio45: rp1_pwm1_gpio45 {
+ function = "pwm1";
+ pins = "gpio45";
+ bias-pull-down;
+ };
+
+ rp1_spi0_gpio9: rp1_spi0_gpio9 {
+ function = "spi0";
+ pins = "gpio9", "gpio10", "gpio11";
+ bias-disable;
+ drive-strength = <12>;
+ slew-rate = <1>;
+ };
+
+ rp1_spi0_cs_gpio7: rp1_spi0_cs_gpio7 {
+ function = "spi0";
+ pins = "gpio7", "gpio8";
+ bias-pull-up;
+ };
+
+ rp1_spi1_gpio19: rp1_spi1_gpio19 {
+ function = "spi1";
+ pins = "gpio19", "gpio20", "gpio21";
+ bias-disable;
+ drive-strength = <12>;
+ slew-rate = <1>;
+ };
+
+ rp1_spi2_gpio1: rp1_spi2_gpio1 {
+ function = "spi2";
+ pins = "gpio1", "gpio2", "gpio3";
+ bias-disable;
+ drive-strength = <12>;
+ slew-rate = <1>;
+ };
+
+ rp1_spi3_gpio5: rp1_spi3_gpio5 {
+ function = "spi3";
+ pins = "gpio5", "gpio6", "gpio7";
+ bias-disable;
+ drive-strength = <12>;
+ slew-rate = <1>;
+ };
+
+ rp1_spi4_gpio9: rp1_spi4_gpio9 {
+ function = "spi4";
+ pins = "gpio9", "gpio10", "gpio11";
+ bias-disable;
+ drive-strength = <12>;
+ slew-rate = <1>;
+ };
+
+ rp1_spi5_gpio13: rp1_spi5_gpio13 {
+ function = "spi5";
+ pins = "gpio13", "gpio14", "gpio15";
+ bias-disable;
+ drive-strength = <12>;
+ slew-rate = <1>;
+ };
+
+ rp1_spi8_gpio49: rp1_spi8_gpio49 {
+ function = "spi8";
+ pins = "gpio49", "gpio50", "gpio51";
+ bias-disable;
+ drive-strength = <12>;
+ slew-rate = <1>;
+ };
+
+ rp1_spi8_cs_gpio52: rp1_spi8_cs_gpio52 {
+ function = "spi0";
+ pins = "gpio52", "gpio53";
+ bias-pull-up;
+ };
+ };
+
+ rp1_eth: ethernet@100000 {
+ reg = <0xc0 0x40100000 0x0 0x4000>;
+ compatible = "raspberrypi,rp1-gem", "cdns,macb";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <RP1_INT_ETH IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_SYS
+ &rp1_clocks RP1_CLK_SYS
+ &rp1_clocks RP1_CLK_ETH_TSU
+ &rp1_clocks RP1_CLK_ETH>;
+ clock-names = "pclk", "hclk", "tsu_clk", "tx_clk";
+ phy-mode = "rgmii-id";
+ cdns,aw2w-max-pipe = /bits/ 8 <8>;
+ cdns,ar2r-max-pipe = /bits/ 8 <8>;
+ cdns,use-aw2b-fill;
+ local-mac-address = [00 00 00 00 00 00];
+ status = "disabled";
+ };
+
+ rp1_csi0: csi@110000 {
+ compatible = "raspberrypi,rp1-cfe";
+ reg = <0xc0 0x40110000 0x0 0x100>, // CSI2 DMA address
+ <0xc0 0x40114000 0x0 0x100>, // PHY/CSI Host address
+ <0xc0 0x40120000 0x0 0x100>, // MIPI CFG address
+ <0xc0 0x40124000 0x0 0x1000>; // PiSP FE address
+
+ // interrupts must match rp1_pisp_fe setup
+ interrupts = <RP1_INT_MIPI0 IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>;
+ assigned-clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>;
+ assigned-clock-rates = <25000000>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ rp1_csi1: csi@128000 {
+ compatible = "raspberrypi,rp1-cfe";
+ reg = <0xc0 0x40128000 0x0 0x100>, // CSI2 DMA address
+ <0xc0 0x4012c000 0x0 0x100>, // PHY/CSI Host address
+ <0xc0 0x40138000 0x0 0x100>, // MIPI CFG address
+ <0xc0 0x4013c000 0x0 0x1000>; // PiSP FE address
+
+ // interrupts must match rp1_pisp_fe setup
+ interrupts = <RP1_INT_MIPI1 IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>;
+ assigned-clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>;
+ assigned-clock-rates = <25000000>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ rp1_pio: pio@178000 {
+ reg = <0xc0 0x40178000 0x0 0x20>;
+ compatible = "raspberrypi,rp1-pio";
+ firmware = <&rp1_firmware>;
+ dmas = <&rp1_dma RP1_DMA_PIO_CH0_TX>, <&rp1_dma RP1_DMA_PIO_CH0_RX>,
+ <&rp1_dma RP1_DMA_PIO_CH1_TX>, <&rp1_dma RP1_DMA_PIO_CH1_RX>,
+ <&rp1_dma RP1_DMA_PIO_CH2_TX>, <&rp1_dma RP1_DMA_PIO_CH2_RX>,
+ <&rp1_dma RP1_DMA_PIO_CH3_TX>, <&rp1_dma RP1_DMA_PIO_CH3_RX>;
+ dma-names = "tx0", "rx0", "tx1", "rx1", "tx2", "rx2", "tx3", "rx3";
+ status = "disabled";
+ };
+
+ rp1_mmc0: mmc@180000 {
+ reg = <0xc0 0x40180000 0x0 0x100>;
+ compatible = "raspberrypi,rp1-dwcmshc";
+ interrupts = <RP1_INT_SDIO0 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_SYS &sdhci_core
+ &rp1_clocks RP1_CLK_SDIO_TIMER
+ &rp1_sdio_clk0>;
+ clock-names = "bus", "core", "timeout", "sdio";
+ /* Bank 0 VDDIO is fixed */
+ no-1-8-v;
+ bus-width = <4>;
+ vmmc-supply = <&rp1_vdd_3v3>;
+ broken-cd;
+ status = "disabled";
+ };
+
+ rp1_mmc1: mmc@184000 {
+ reg = <0xc0 0x40184000 0x0 0x100>;
+ compatible = "raspberrypi,rp1-dwcmshc";
+ interrupts = <RP1_INT_SDIO1 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_SYS &sdhci_core
+ &rp1_clocks RP1_CLK_SDIO_TIMER
+ &rp1_sdio_clk1>;
+ clock-names = "bus", "core", "timeout", "sdio";
+ bus-width = <4>;
+ vmmc-supply = <&rp1_vdd_3v3>;
+ /* Nerf SDR speeds */
+ sdhci-caps-mask = <0x3 0x0>;
+ broken-cd;
+ status = "disabled";
+ };
+
+ rp1_dma: dma@188000 {
+ reg = <0xc0 0x40188000 0x0 0x1000>;
+ compatible = "snps,axi-dma-1.01a";
+ interrupts = <RP1_INT_DMA IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rp1_clocks RP1_CLK_DMA &rp1_clocks RP1_CLK_SYS>;
+ clock-names = "core-clk", "cfgr-clk";
+
+ #dma-cells = <1>;
+ dma-channels = <8>;
+ snps,dma-masters = <1>;
+ snps,dma-targets = <64>;
+ snps,data-width = <4>; // (8 << 4) == 128 bits
+ snps,block-size = <0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000>;
+ snps,priority = <0 1 2 3 4 5 6 7>;
+ snps,axi-max-burst-len = <4>;
+ status = "disabled";
+ };
+
+ rp1_usb0: usb@200000 {
+ reg = <0xc0 0x40200000 0x0 0x100000>;
+ compatible = "snps,dwc3";
+ dr_mode = "host";
+ usb3-lpm-capable;
+ snps,axi-pipe-limit = /bits/ 8 <8>;
+ snps,dis_rxdet_inp3_quirk;
+ snps,enhanced-nak-fs-quirk;
+ snps,parkmode-disable-ss-quirk;
+ snps,parkmode-disable-hs-quirk;
+ snps,parkmode-disable-fsls-quirk;
+ snps,tx-max-burst = /bits/ 8 <8>;
+ snps,tx-thr-num-pkt = /bits/ 8 <2>;
+ interrupts = <RP1_INT_USBHOST0_0 IRQ_TYPE_EDGE_RISING>;
+ status = "disabled";
+ };
+
+ rp1_usb1: usb@300000 {
+ reg = <0xc0 0x40300000 0x0 0x100000>;
+ compatible = "snps,dwc3";
+ dr_mode = "host";
+ usb3-lpm-capable;
+ snps,axi-pipe-limit = /bits/ 8 <8>;
+ snps,dis_rxdet_inp3_quirk;
+ snps,enhanced-nak-fs-quirk;
+ snps,parkmode-disable-ss-quirk;
+ snps,parkmode-disable-hs-quirk;
+ snps,parkmode-disable-fsls-quirk;
+ snps,tx-max-burst = /bits/ 8 <8>;
+ snps,tx-thr-num-pkt = /bits/ 8 <2>;
+ interrupts = <RP1_INT_USBHOST1_0 IRQ_TYPE_EDGE_RISING>;
+ status = "disabled";
+ };
+
+ rp1_dsi0: dsi@110000 {
+ compatible = "raspberrypi,rp1dsi";
+ status = "disabled";
+ reg = <0xc0 0x40118000 0x0 0x1000>, // MIPI0 DSI DMA (ArgonDPI)
+ <0xc0 0x4011c000 0x0 0x1000>, // MIPI0 DSI Host (SNPS)
+ <0xc0 0x40120000 0x0 0x1000>; // MIPI0 CFG
+
+ interrupts = <RP1_INT_MIPI0 IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>,
+ <&rp1_clocks RP1_CLK_MIPI0_DPI>,
+ <&rp1_clocks RP1_CLK_MIPI0_DSI_BYTECLOCK>,
+ <&clk_xosc>, // hardwired to DSI "refclk"
+ <&rp1_clocks RP1_PLL_SYS>; // alternate parent for divide
+ clock-names = "cfgclk", "dpiclk", "byteclk", "refclk", "pllsys";
+
+ assigned-clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>;
+ assigned-clock-rates = <25000000>;
+ };
+
+ rp1_dsi1: dsi@128000 {
+ compatible = "raspberrypi,rp1dsi";
+ status = "disabled";
+ reg = <0xc0 0x40130000 0x0 0x1000>, // MIPI1 DSI DMA (ArgonDPI)
+ <0xc0 0x40134000 0x0 0x1000>, // MIPI1 DSI Host (SNPS)
+ <0xc0 0x40138000 0x0 0x1000>; // MIPI1 CFG
+
+ interrupts = <RP1_INT_MIPI1 IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>,
+ <&rp1_clocks RP1_CLK_MIPI1_DPI>,
+ <&rp1_clocks RP1_CLK_MIPI1_DSI_BYTECLOCK>,
+ <&clk_xosc>, // hardwired to DSI "refclk"
+ <&rp1_clocks RP1_PLL_SYS>; // alternate parent for divide
+ clock-names = "cfgclk", "dpiclk", "byteclk", "refclk", "pllsys";
+
+ assigned-clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>;
+ assigned-clock-rates = <25000000>;
+ };
+
+ /* VEC and DPI both need to control PLL_VIDEO and cannot work together; */
+ /* config.txt should enable one or other using dtparam=vec or an overlay. */
+ rp1_vec: vec@144000 {
+ compatible = "raspberrypi,rp1vec";
+ status = "disabled";
+ reg = <0xc0 0x40144000 0x0 0x1000>, // VIDEO_OUT_VEC
+ <0xc0 0x40140000 0x0 0x1000>; // VIDEO_OUT_CFG
+
+ interrupts = <RP1_INT_VIDEO_OUT IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&rp1_clocks RP1_CLK_VEC>;
+
+ assigned-clocks = <&rp1_clocks RP1_PLL_VIDEO_CORE>,
+ <&rp1_clocks RP1_PLL_VIDEO_SEC>,
+ <&rp1_clocks RP1_CLK_VEC>;
+ assigned-clock-rates = <1188000000>,
+ <108000000>,
+ <108000000>;
+ assigned-clock-parents = <0>,
+ <&rp1_clocks RP1_PLL_VIDEO_CORE>,
+ <&rp1_clocks RP1_PLL_VIDEO_SEC>;
+ };
+
+ rp1_dpi: dpi@148000 {
+ compatible = "raspberrypi,rp1dpi";
+ status = "disabled";
+ reg = <0xc0 0x40148000 0x0 0x1000>, // VIDEO_OUT DPI
+ <0xc0 0x40140000 0x0 0x1000>; // VIDEO_OUT_CFG
+
+ interrupts = <RP1_INT_VIDEO_OUT IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&rp1_clocks RP1_CLK_DPI>, // DPI pixel clock
+ <&rp1_clocks RP1_PLL_VIDEO>, // PLL primary divider, and
+ <&rp1_clocks RP1_PLL_VIDEO_CORE>; // VCO, which we also control
+ clock-names = "dpiclk", "plldiv", "pllcore";
+
+ assigned-clocks = <&rp1_clocks RP1_CLK_DPI>;
+ assigned-clock-parents = <&rp1_clocks RP1_PLL_VIDEO>;
+ };
+
+ sram: sram@400000 {
+ compatible = "mmio-sram";
+ reg = <0xc0 0x40400000 0x0 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xc0 0x40400000 0x10000>;
+
+ rp1_fw_shmem: shmem@ff00 {
+ compatible = "raspberrypi,rp1-shmem";
+ reg = <0xff00 0x100>; // firmware mailbox buffer
+ };
+ };
+ };
+};
+
+&clocks {
+ clk_xosc: clk_xosc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-output-names = "xosc";
+ clock-frequency = <50000000>;
+ };
+ sdio_src: sdio_src {
+ // 400 MHz on FPGA. PLL sys VCO on asic
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-output-names = "src";
+ clock-frequency = <1000000000>;
+ };
+ sdhci_core: sdhci_core {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-output-names = "core";
+ clock-frequency = <50000000>;
+ };
+ /* GPIO derived clock sources. Each GPIO with a GPCLK function
+ * can drive its output from the respective GPCLK
+ * generator, and provide a clock source to other internal
+ * dividers. Add dummy sources here so that they can be overridden
+ * with overlays.
+ */
+ clksrc_gp0: clksrc_gp0 {
+ status = "disabled";
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clock-div = <1>;
+ clock-mult = <1>;
+ clocks = <&rp1_clocks RP1_CLK_GP0>;
+ clock-output-names = "clksrc_gp0";
+ };
+ clksrc_gp1: clksrc_gp1 {
+ status = "disabled";
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clock-div = <1>;
+ clock-mult = <1>;
+ clocks = <&rp1_clocks RP1_CLK_GP1>;
+ clock-output-names = "clksrc_gp1";
+ };
+ clksrc_gp2: clksrc_gp2 {
+ status = "disabled";
+ compatible = "fixed-factor-clock";
+ clock-div = <1>;
+ clock-mult = <1>;
+ #clock-cells = <0>;
+ clocks = <&rp1_clocks RP1_CLK_GP2>;
+ clock-output-names = "clksrc_gp2";
+ };
+ clksrc_gp3: clksrc_gp3 {
+ status = "disabled";
+ compatible = "fixed-factor-clock";
+ clock-div = <1>;
+ clock-mult = <1>;
+ #clock-cells = <0>;
+ clocks = <&rp1_clocks RP1_CLK_GP3>;
+ clock-output-names = "clksrc_gp3";
+ };
+ clksrc_gp4: clksrc_gp4 {
+ status = "disabled";
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clock-div = <1>;
+ clock-mult = <1>;
+ clocks = <&rp1_clocks RP1_CLK_GP4>;
+ clock-output-names = "clksrc_gp4";
+ };
+ clksrc_gp5: clksrc_gp5 {
+ status = "disabled";
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clock-div = <1>;
+ clock-mult = <1>;
+ clocks = <&rp1_clocks RP1_CLK_GP5>;
+ clock-output-names = "clksrc_gp5";
+ };
+};
+
+/ {
+ rp1_firmware: rp1_firmware {
+ compatible = "raspberrypi,rp1-firmware", "simple-mfd";
+ mboxes = <&rp1_mbox 0>;
+ shmem = <&rp1_fw_shmem>;
+ };
+
+ rp1_vdd_3v3: rp1_vdd_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+};
generated by cgit (git 2.51.2) at 2025-12-03 19:04:27 +0000