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| author | Sean Christopherson <[email protected]> | 2025-02-24 17:45:22 +0000 |
|---|---|---|
| committer | Sean Christopherson <[email protected]> | 2025-02-28 17:16:21 +0000 |
| commit | d4b69c3d1471a7fa48111b3bb6489e7c5a5bcb2a (patch) | |
| tree | 47583cc5daa77bc9f4f4db73a7306e8d4e6e9588 /tools/testing/selftests/net/lib/py/utils.py | |
| parent | KVM: SVM: Add Idle HLT intercept support (diff) | |
| download | kernel-d4b69c3d1471a7fa48111b3bb6489e7c5a5bcb2a.tar.gz kernel-d4b69c3d1471a7fa48111b3bb6489e7c5a5bcb2a.zip | |
KVM: SVM: Inject #GP if memory operand for INVPCID is non-canonical
Inject a #GP if the memory operand received by INVCPID is non-canonical.
The APM clearly states that the intercept takes priority over all #GP
checks except the CPL0 restriction.
Of course, that begs the question of how the CPU generates a linear
address in the first place. Tracing confirms that EXITINFO1 does hold a
linear address, at least for 64-bit mode guests (hooray GS prefix).
Unfortunately, the APM says absolutely nothing about the EXITINFO fields
for INVPCID intercepts, so it's not at all clear what's supposed to
happen.
Add a FIXME to call out that KVM still does the wrong thing for 32-bit
guests, and if the stack segment is used for the memory operand.
Cc: Babu Moger <[email protected]>
Cc: Jim Mattson <[email protected]>
Fixes: 4407a797e941 ("KVM: SVM: Enable INVPCID feature on AMD")
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Sean Christopherson <[email protected]>
Diffstat (limited to 'tools/testing/selftests/net/lib/py/utils.py')
0 files changed, 0 insertions, 0 deletions
