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authorSam Protsenko <[email protected]>2023-08-19 03:17:29 +0000
committerVinod Koul <[email protected]>2023-08-22 14:11:15 +0000
commit691525074db97d9b684dd1457fd8dc9842a36615 (patch)
tree1f4a6be4659325243e5b6c5d1061e8b5d61016fc /tools/testing/selftests/bpf/prog_tests/autoload.c
parentphy: exynos5-usbdrd: Add 26MHz ref clk support (diff)
downloadkernel-691525074db97d9b684dd1457fd8dc9842a36615.tar.gz
kernel-691525074db97d9b684dd1457fd8dc9842a36615.zip
phy: exynos5-usbdrd: Add Exynos850 support
Implement Exynos850 USB 2.0 DRD PHY controller support. Exynos850 has quite a different PHY controller than Exynos5 compatible controllers, but it's still possible to implement it on top of existing exynos5-usbdrd driver infrastructure. Only UTMI+ (USB 2.0) PHY interface is implemented, as Exynos850 doesn't support USB 3.0. Only two clocks are used for this controller: - phy: bus clock, used for PHY registers access - ref: PHY reference clock (OSCCLK) Signed-off-by: Sam Protsenko <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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