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| author | Peter Ujfalusi <[email protected]> | 2014-04-30 11:39:37 +0000 |
|---|---|---|
| committer | Tero Kristo <[email protected]> | 2014-06-06 17:33:34 +0000 |
| commit | 81c7e03acbcb68274be770134f8f04f270ffa859 (patch) | |
| tree | ca6115715324f00441d89cc4a08e6a6382b48687 /tools/perf/scripts/python | |
| parent | CLK: TI: Driver for DRA7 ATL (Audio Tracking Logic) (diff) | |
| download | kernel-81c7e03acbcb68274be770134f8f04f270ffa859.tar.gz kernel-81c7e03acbcb68274be770134f8f04f270ffa859.zip | |
CLK: TI: clk-54xx: Set the rate for dpll_abe_m2x2_ck
In order to get correct clock dividers for AESS/ABE we need to set the
dpll_abe_m2x2_ck rate to be double of dpll_abe_ck.
Signed-off-by: Peter Ujfalusi <[email protected]>
Signed-off-by: Tero Kristo <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions