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| author | Vasant Hegde <[email protected]> | 2023-03-10 09:00:00 +0000 |
|---|---|---|
| committer | Joerg Roedel <[email protected]> | 2023-03-28 13:31:31 +0000 |
| commit | f594496403fa383259aa7dfad92f383a2ee07e1b (patch) | |
| tree | 2a533c413696fe7b68691b6517f172d2a528e224 /tools/perf/scripts/python/task-analyzer.py | |
| parent | iommu/amd: Allocate IOMMU irqs using numa locality info (diff) | |
| download | kernel-f594496403fa383259aa7dfad92f383a2ee07e1b.tar.gz kernel-f594496403fa383259aa7dfad92f383a2ee07e1b.zip | |
iommu/amd: Add 5 level guest page table support
Newer AMD IOMMU supports 5 level guest page table (v2 page table). If both
processor and IOMMU supports 5 level page table then enable it. Otherwise
fall back to 4 level page table.
Co-developed-by: Wei Huang <[email protected]>
Signed-off-by: Wei Huang <[email protected]>
Reviewed-by: Suravee Suthikulpanit <[email protected]>
Signed-off-by: Vasant Hegde <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Joerg Roedel <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions