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| author | Niravkumar L Rabara <[email protected]> | 2023-08-01 01:02:31 +0000 |
|---|---|---|
| committer | Dinh Nguyen <[email protected]> | 2023-08-08 11:32:34 +0000 |
| commit | 2a29fe831f80f6d9187e49a272d795f3d1b54cdb (patch) | |
| tree | 2c3b6899a495d0d0a9a398c1000e9b85ed502276 /tools/perf/scripts/python/syscall-counts.py | |
| parent | dt-bindings: intel: Add Intel Agilex5 compatible (diff) | |
| download | kernel-2a29fe831f80f6d9187e49a272d795f3d1b54cdb.tar.gz kernel-2a29fe831f80f6d9187e49a272d795f3d1b54cdb.zip | |
dt-bindings: reset: add reset IDs for Agilex5
Add reset ID definitions required for Intel Agilex5 SoCFPGA, re-use
altr,rst-mgr-s10.h as common header file similar S10 & Agilex.
Acked-by: Conor Dooley <[email protected]>
Reviewed-by: Dinh Nguyen <[email protected]>
Signed-off-by: Niravkumar L Rabara <[email protected]>
Signed-off-by: Dinh Nguyen <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions