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| author | Atish Patra <[email protected]> | 2018-10-02 19:14:58 +0000 |
|---|---|---|
| committer | Palmer Dabbelt <[email protected]> | 2018-10-23 00:03:36 +0000 |
| commit | 6db170ff4c088caaf7806c00b29a55f6df07d7b6 (patch) | |
| tree | d91d87868100acbbf8436728ebcdccc152689766 /tools/perf/scripts/python/stackcollapse.py | |
| parent | RISC-V: Comment on the TLB flush in smp_callin() (diff) | |
| download | kernel-6db170ff4c088caaf7806c00b29a55f6df07d7b6.tar.gz kernel-6db170ff4c088caaf7806c00b29a55f6df07d7b6.zip | |
RISC-V: Disable preemption before enabling interrupts
Currently, irq is enabled before preemption disabling happens.
If the scheduler fired right here and cpu is scheduled then it
may blow up.
Signed-off-by: Palmer Dabbelt <[email protected]>
[Atish: Commit text and code comment formatting update]
Signed-off-by: Atish Patra <[email protected]>
Reviewed-by: Christoph Hellwig <[email protected]>
Signed-off-by: Palmer Dabbelt <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions