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| author | Xingyu Wu <[email protected]> | 2023-07-17 02:30:38 +0000 |
|---|---|---|
| committer | Conor Dooley <[email protected]> | 2023-07-19 17:08:00 +0000 |
| commit | a013e9818734ade52944e73f64242633c6cd4128 (patch) | |
| tree | ec1fe654fdbaaf0b64b0c2a3d31b88ef369cd1c0 /tools/perf/scripts/python/sctop.py | |
| parent | clk: starfive: Add StarFive JH7110 PLL clock driver (diff) | |
| download | kernel-a013e9818734ade52944e73f64242633c6cd4128.tar.gz kernel-a013e9818734ade52944e73f64242633c6cd4128.zip | |
clk: starfive: jh7110-sys: Add PLL clocks source from DTS
Modify PLL clocks source to be got from DTS or
the fixed factor clocks.
Signed-off-by: Xingyu Wu <[email protected]>
Reviewed-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/sctop.py')
0 files changed, 0 insertions, 0 deletions