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| author | Atish Patra <[email protected]> | 2019-08-03 04:27:23 +0000 |
|---|---|---|
| committer | Paul Walmsley <[email protected]> | 2019-08-08 23:05:38 +0000 |
| commit | 94ed3fde38c7c1347cd82b945553905cfd992ab9 (patch) | |
| tree | 8fd9a56c5a8d11503506ddcc18c501882156cfe8 /tools/perf/scripts/python/sched-migration.py | |
| parent | RISC-V: Remove per cpu clocksource (diff) | |
| download | kernel-94ed3fde38c7c1347cd82b945553905cfd992ab9.tar.gz kernel-94ed3fde38c7c1347cd82b945553905cfd992ab9.zip | |
dt-bindings: Update the riscv,isa string description
Since the RISC-V specification states that ISA description strings are
case-insensitive, there's no functional difference between mixed-case,
upper-case, and lower-case ISA strings. Thus, to simplify parsing,
specify that the letters present in "riscv,isa" must be all lowercase.
Suggested-by: Paul Walmsley <[email protected]>
Signed-off-by: Atish Patra <[email protected]>
Signed-off-by: Paul Walmsley <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/sched-migration.py')
0 files changed, 0 insertions, 0 deletions