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| author | Guiting Shen <[email protected]> | 2023-07-15 03:06:20 +0000 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2023-07-25 11:10:00 +0000 |
| commit | f85739c0b2b0d98a32f5ca4fcc5501d2b76df4f6 (patch) | |
| tree | e27eff67f24fb4af9be81207923a8100bc9acd7e /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | ASoC: rt711-sdca: fix for JD event handling in ClockStop Mode0 (diff) | |
| download | kernel-f85739c0b2b0d98a32f5ca4fcc5501d2b76df4f6.tar.gz kernel-f85739c0b2b0d98a32f5ca4fcc5501d2b76df4f6.zip | |
ASoC: atmel: Fix the 8K sample parameter in I2SC master
The 8K sample parameter of 12.288Mhz main system bus clock doesn't work
because the I2SC_MR.IMCKDIV must not be 0 according to the sama5d2
series datasheet(I2SC Mode Register of Register Summary).
So use the 6.144Mhz instead of 12.288Mhz to support 8K sample.
Signed-off-by: Guiting Shen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions