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| author | Alexandre Belloni <[email protected]> | 2019-04-02 12:50:54 +0000 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2019-04-25 19:34:06 +0000 |
| commit | a436c2a447e59740e8bc5c604abac33419099673 (patch) | |
| tree | dcbabdd4516f54caeb5bd438a3b3c6c1459fa215 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | clk: at91: master: Add sam9x60 support (diff) | |
| download | kernel-a436c2a447e59740e8bc5c604abac33419099673.tar.gz kernel-a436c2a447e59740e8bc5c604abac33419099673.zip | |
clk: at91: add sam9x60 PLL driver
The PLLs on the sam9x60 (PLLA and USB PLL) use a different register set and
programming model than the previous SoCs.
Signed-off-by: Alexandre Belloni <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions