aboutsummaryrefslogtreecommitdiffstats
path: root/tools/perf/scripts/python/mem-phys-addr.py
diff options
context:
space:
mode:
authorDave Hansen <[email protected]>2017-12-04 14:07:58 +0000
committerIngo Molnar <[email protected]>2017-12-23 20:13:00 +0000
commit48e111982cda033fec832c6b0592c2acedd85d04 (patch)
tree7d8e103604798b323f3bd3274c2183e285f23844 /tools/perf/scripts/python/mem-phys-addr.py
parentx86/mm: Allow flushing for future ASID switches (diff)
downloadkernel-48e111982cda033fec832c6b0592c2acedd85d04.tar.gz
kernel-48e111982cda033fec832c6b0592c2acedd85d04.zip
x86/mm: Abstract switching CR3
In preparation to adding additional PCID flushing, abstract the loading of a new ASID into CR3. [ PeterZ: Split out from big combo patch ] Signed-off-by: Dave Hansen <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Cc: Andy Lutomirski <[email protected]> Cc: Boris Ostrovsky <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: Brian Gerst <[email protected]> Cc: David Laight <[email protected]> Cc: Denys Vlasenko <[email protected]> Cc: Eduardo Valentin <[email protected]> Cc: Greg KH <[email protected]> Cc: H. Peter Anvin <[email protected]> Cc: Josh Poimboeuf <[email protected]> Cc: Juergen Gross <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Will Deacon <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Signed-off-by: Ingo Molnar <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions