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| author | Nick Desaulniers <[email protected]> | 2018-01-03 20:39:52 +0000 |
|---|---|---|
| committer | Thomas Gleixner <[email protected]> | 2018-01-03 22:19:33 +0000 |
| commit | 2fd9c41aea47f4ad071accf94b94f94f2c4d31eb (patch) | |
| tree | 341ab7ce325f5f390affa28d968e36d423642a17 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | x86/pti: Switch to kernel CR3 at early in entry_SYSCALL_compat() (diff) | |
| download | kernel-2fd9c41aea47f4ad071accf94b94f94f2c4d31eb.tar.gz kernel-2fd9c41aea47f4ad071accf94b94f94f2c4d31eb.zip | |
x86/process: Define cpu_tss_rw in same section as declaration
cpu_tss_rw is declared with DECLARE_PER_CPU_PAGE_ALIGNED
but then defined with DEFINE_PER_CPU_SHARED_ALIGNED
leading to section mismatch warnings.
Use DEFINE_PER_CPU_PAGE_ALIGNED consistently. This is necessary because
it's mapped to the cpu entry area and must be page aligned.
[ tglx: Massaged changelog a bit ]
Fixes: 1a935bc3d4ea ("x86/entry: Move SYSENTER_stack to the beginning of struct tss_struct")
Suggested-by: Thomas Gleixner <[email protected]>
Signed-off-by: Nick Desaulniers <[email protected]>
Signed-off-by: Thomas Gleixner <[email protected]>
Cc: [email protected]
Cc: Borislav Petkov <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Link: https://lkml.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions
