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| author | William Qiu <[email protected]> | 2023-07-17 02:30:35 +0000 |
|---|---|---|
| committer | Conor Dooley <[email protected]> | 2023-07-19 17:08:00 +0000 |
| commit | c81f7845b2ce7a2ea1beb2ac4621b5d568d2b644 (patch) | |
| tree | ee7a715bd470a0512a2cc8df30584fb004b4b330 /tools/perf/scripts/python/futex-contention.py | |
| parent | dt-bindings: clock: Add StarFive JH7110 PLL clock generator (diff) | |
| download | kernel-c81f7845b2ce7a2ea1beb2ac4621b5d568d2b644.tar.gz kernel-c81f7845b2ce7a2ea1beb2ac4621b5d568d2b644.zip | |
dt-bindings: soc: starfive: Add StarFive syscon module
Add documentation to describe StarFive System Controller Registers.
Reviewed-by: Emil Renner Berthing <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Co-developed-by: Xingyu Wu <[email protected]>
Signed-off-by: Xingyu Wu <[email protected]>
Signed-off-by: William Qiu <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/futex-contention.py')
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