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authorAnson Huang <[email protected]>2018-06-04 01:06:45 +0000
committerStephen Boyd <[email protected]>2018-06-29 18:29:35 +0000
commit566f5b67fc0c3bffec03a963334eb7c1df30204d (patch)
treee4d17eeccf22080e6d2220008862fb0a914182ca /tools/perf/scripts/python/futex-contention.py
parentclk: imx6sl: remove clks_init_on array (diff)
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clk: imx6sx: remove clks_init_on array
Clock framework will enable those clocks registered with CLK_IS_CRITICAL flag, so no need to have clks_init_on array during clock initialization now. ARM clock is busy divider type which has the CLK_IS_CRITICAL flag set by default when registered. IPG clock has no clock gate and its parent AHB clock is busy divider type, so no need to add CLK_IS_CRITICAL flag for IPG clock. Signed-off-by: Anson Huang <[email protected]> Reviewed-by: Fabio Estevam <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
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