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authorVineet Gupta <[email protected]>2015-07-29 13:50:58 +0000
committerVineet Gupta <[email protected]>2015-08-04 03:56:31 +0000
commitf5959cb0c34c5c7f9f387e5d8fe1ec831ccb42ac (patch)
tree646f0fc7d94072c3f974caa3b0b6033defc6bbe8 /tools/perf/scripts/python/failed-syscalls-by-pid.py
parentARCv2: [axs103_smp] Reduce clk for Quad FPGA configs (diff)
downloadkernel-f5959cb0c34c5c7f9f387e5d8fe1ec831ccb42ac.tar.gz
kernel-f5959cb0c34c5c7f9f387e5d8fe1ec831ccb42ac.zip
Revert "ARCv2: STAR 9000837815 workaround hardware exclusive transactions livelock"
Extended testing of quad core configuration revealed that this fix was insufficient. Specifically LTP open posix shm_op/23-1 would cause the hardware livelock in llock/scond loop in update_cpu_load_active() So remove this and make way for a proper workaround This reverts commit a5c8b52abe677977883655166796f167ef1e0084. Signed-off-by: Vineet Gupta <[email protected]>
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