diff options
| author | Sai Prakash Ranjan <[email protected]> | 2019-07-04 09:53:05 +0000 |
|---|---|---|
| committer | Greg Kroah-Hartman <[email protected]> | 2019-07-04 10:23:26 +0000 |
| commit | 996cdfaf538f159f822f2619d55449c587b86cb6 (patch) | |
| tree | cd76d7c44f00b1462753abdc98f371611acafc0f /tools/perf/scripts/python/failed-syscalls-by-pid.py | |
| parent | dt-bindings: coresight: Change CPU phandle to required property (diff) | |
| download | kernel-996cdfaf538f159f822f2619d55449c587b86cb6.tar.gz kernel-996cdfaf538f159f822f2619d55449c587b86cb6.zip | |
coresight: Do not default to CPU0 for missing CPU phandle
Coresight platform support assumes that a missing "cpu" phandle
defaults to CPU0. This could be problematic and unnecessarily binds
components to CPU0, where they may not be. In coresight etm and
cpu-debug drivers, abort the probe for such cases.
Signed-off-by: Sai Prakash Ranjan <[email protected]>
Reviewed-by: Suzuki K Poulose <[email protected]>
Tested-by: Mathieu Poirier <[email protected]>
Reviewed-by: Mathieu Poirier <[email protected]>
Link: https://lore.kernel.org/r/f1955ea19c714cf64ea54ec356a9aa85f3cd17b8.1562229018.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/failed-syscalls-by-pid.py')
0 files changed, 0 insertions, 0 deletions