diff options
| author | Peng Fan <[email protected]> | 2025-07-07 02:24:40 +0000 |
|---|---|---|
| committer | Abel Vesa <[email protected]> | 2025-07-21 07:33:56 +0000 |
| commit | 9678bc7661cb34bec4be92685039eec68ca67dad (patch) | |
| tree | 1cd57aaad2b6423c01cfb19826e03b7e1e0a9aed /tools/perf/scripts/python/failed-syscalls-by-pid.py | |
| parent | clk: imx95-blk-ctl: Rename lvds and displaymix csr blk (diff) | |
| download | kernel-9678bc7661cb34bec4be92685039eec68ca67dad.tar.gz kernel-9678bc7661cb34bec4be92685039eec68ca67dad.zip | |
clk: imx95-blk-ctl: Add clock for i.MX94 LVDS/Display CSR
i.MX94 BLK CTL LVDS CSR's LVDS_PHY_CLOCK_CONTRL register controls the clock
gating logic of LVDS units. Display CSR's DISPLAY_ENGINES_CLOCK_CONTROL
register controls the selection of the clock feeding the display engine.
Add clock gate support for the two CSRs.
Reviewed-by: Abel Vesa <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Abel Vesa <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/failed-syscalls-by-pid.py')
0 files changed, 0 insertions, 0 deletions