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| author | Dinh Nguyen <[email protected]> | 2017-09-22 18:42:47 +0000 |
|---|---|---|
| committer | Philipp Zabel <[email protected]> | 2017-10-04 08:29:44 +0000 |
| commit | f450f28e70a2378d9d6ded0932fe480055888cfa (patch) | |
| tree | f18259410861b6a69016cfcac9be0ee75888d28f /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | reset: Restrict RESET_HSDK to ARC_SOC_HSDK or COMPILE_TEST (diff) | |
| download | kernel-f450f28e70a2378d9d6ded0932fe480055888cfa.tar.gz kernel-f450f28e70a2378d9d6ded0932fe480055888cfa.zip | |
reset: socfpga: fix for 64-bit compilation
The SoCFPGA Stratix10 reset controller has 32-bit registers. Thus, we
cannot use BITS_PER_LONG in computing the register and bit offset. Instead,
we should be using the width of the hardware register for the calculation.
Signed-off-by: Dinh Nguyen <[email protected]>
Signed-off-by: Philipp Zabel <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions