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| author | Biju Das <[email protected]> | 2023-07-14 07:56:49 +0000 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2023-07-25 09:12:28 +0000 |
| commit | 2fd3f06b527e6ffaa929129a267386961e20a86c (patch) | |
| tree | 69550c1804ca9158669e15426282554cda750a8a /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | clk: renesas: rzg2l: Simplify .determine_rate() (diff) | |
| download | kernel-2fd3f06b527e6ffaa929129a267386961e20a86c.tar.gz kernel-2fd3f06b527e6ffaa929129a267386961e20a86c.zip | |
clk: renesas: r9a07g043: Add MTU3a clock and reset entry
Add MTU3a clock and reset entry to CPG driver.
Signed-off-by: Biju Das <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions