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| author | Dave Jiang <[email protected]> | 2023-02-14 19:41:30 +0000 |
|---|---|---|
| committer | Dan Williams <[email protected]> | 2023-02-14 23:45:21 +0000 |
| commit | 4474ce565ee4490fb4e6d8443b617a9d98ae10ff (patch) | |
| tree | 6e95405cb64326700e8af5863425cc9e4ce494d7 /tools/perf/scripts/python/compaction-times.py | |
| parent | cxl/hdm: Emulate HDM decoder from DVSEC range registers (diff) | |
| download | kernel-4474ce565ee4490fb4e6d8443b617a9d98ae10ff.tar.gz kernel-4474ce565ee4490fb4e6d8443b617a9d98ae10ff.zip | |
cxl/hdm: Create emulated cxl_hdm for devices that do not have HDM decoders
CXL rev3 spec 8.1.3
RCDs may not have HDM register blocks. Create a fake HDM with information
from the CXL PCIe DVSEC registers. The decoder count will be set to the
HDM count retrieved from the DVSEC cap register.
Reviewed-by: Jonathan Cameron <[email protected]>
Signed-off-by: Dave Jiang <[email protected]>
Link: https://lore.kernel.org/r/167640368994.935665.15831225724059704620.stgit@dwillia2-xfh.jf.intel.com
Signed-off-by: Dan Williams <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/compaction-times.py')
0 files changed, 0 insertions, 0 deletions