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| author | Arnd Bergmann <[email protected]> | 2017-12-21 15:59:19 +0000 |
|---|---|---|
| committer | Arnd Bergmann <[email protected]> | 2017-12-21 15:59:19 +0000 |
| commit | 6b457409169b7686d293b408da0b6446ccb57a76 (patch) | |
| tree | f231d78cfa4c80c873b0e37249dd008b0ba9253f /tools/perf/scripts/python/check-perf-trace.py | |
| parent | ARM: dts: aspeed-g4: Correct VUART IRQ number (diff) | |
| parent | ARM: dts: rockchip: fix rk3288 iep-IOMMU interrupts property cells (diff) | |
| download | kernel-6b457409169b7686d293b408da0b6446ccb57a76.tar.gz kernel-6b457409169b7686d293b408da0b6446ccb57a76.zip | |
Merge tag 'v4.15-rockchip-dts32fixes-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into fixes
Pull "Rockchip dts32 fixes for 4.15" from Heiko Stübner:
Removed another trailing interrupt-cell 0 and added the cpu regulator
on the rk3066a-marsboard to make it not fail from cpufreq changes.
* tag 'v4.15-rockchip-dts32fixes-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: fix rk3288 iep-IOMMU interrupts property cells
ARM: dts: rockchip: add cpu0-regulator on rk3066a-marsboard
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions