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| author | avisconti <[email protected]> | 2010-10-25 18:58:14 +0000 |
|---|---|---|
| committer | David S. Miller <[email protected]> | 2010-10-28 18:47:54 +0000 |
| commit | 19449bfc10d163f0024dd5ae5808e28cda32e7b4 (patch) | |
| tree | b32bcc4f66ac12f1a6c94d73a0ada36412cfa8a7 /tools/perf/scripts/python/check-perf-trace.py | |
| parent | net: atarilance - flags should be unsigned long (diff) | |
| download | kernel-19449bfc10d163f0024dd5ae5808e28cda32e7b4.tar.gz kernel-19449bfc10d163f0024dd5ae5808e28cda32e7b4.zip | |
stmmac: enable/disable rx/tx in the core with a single write.
This patch enables and disables the rx and tx bits in the MAC control reg
by using a single write operation.
This also solves a possible problem (spotted on SPEAr platforms) at 10Mbps
where two consecutive writes to a MAC control register can take more than
4 phy_clk cycles.
Signed-off-by: Armando Visconti <[email protected]>
Acked-by: Giuseppe Cavallaro <[email protected]>
Signed-off-by: David S. Miller <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions