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authorJeremy Kerr <[email protected]>2023-03-02 00:58:30 +0000
committerStephen Boyd <[email protected]>2023-03-06 22:11:09 +0000
commit1038b6978b438d954e2e827d4d553bed94cd83e0 (patch)
treeb04d011ded8d73a3eb6173e1e60dd1e9dac4f74c /tools/perf/scripts/python/check-perf-trace.py
parentclk: ast2600: allow empty entries in aspeed_g6_gates (diff)
downloadkernel-1038b6978b438d954e2e827d4d553bed94cd83e0.tar.gz
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dt-bindings: clock: ast2600: Add top-level I3C clock
The ast2600 hardware has a top-level clock for all i3c controller peripherals (then gated to each individual controller), so add a top-level i3c clock line to control this. This is a partial cherry-pick and rework of ed44b8cdfdb and 1a35eb926d7 from Aspeed's own tree, originally by Dylan Hung <[email protected]>. Acked-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Joel Stanley <[email protected]> Signed-off-by: Jeremy Kerr <[email protected]> Link: https://lore.kernel.org/r/[email protected] Tested-by: Joel Stanley <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
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