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| author | Lad Prabhakar <[email protected]> | 2023-08-18 13:57:20 +0000 |
|---|---|---|
| committer | Palmer Dabbelt <[email protected]> | 2023-09-01 16:08:57 +0000 |
| commit | b79f300c1fd4bd83b1f827c7a0e043fca7aad73c (patch) | |
| tree | 0d237b4071a4e5b7be07418fd9f9cc253f3b6245 /tools/perf/builtin-script.c | |
| parent | riscv: errata: Add Andes alternative ports (diff) | |
| download | kernel-b79f300c1fd4bd83b1f827c7a0e043fca7aad73c.tar.gz kernel-b79f300c1fd4bd83b1f827c7a0e043fca7aad73c.zip | |
riscv: mm: dma-noncoherent: nonstandard cache operations support
Introduce support for nonstandard noncoherent systems in the RISC-V
architecture. It enables function pointer support to handle cache
management in such systems.
This patch adds a new configuration option called
"RISCV_NONSTANDARD_CACHE_OPS." This option is a boolean flag that
depends on "RISCV_DMA_NONCOHERENT" and enables the function pointer
support for cache management in nonstandard noncoherent systems.
Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Tested-by: Conor Dooley <[email protected]> # tyre-kicking on a d1
Reviewed-by: Emil Renner Berthing <[email protected]>
Tested-by: Emil Renner Berthing <[email protected]> #
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Palmer Dabbelt <[email protected]>
Diffstat (limited to 'tools/perf/builtin-script.c')
0 files changed, 0 insertions, 0 deletions