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authorLad Prabhakar <[email protected]>2023-08-18 13:57:23 +0000
committerPalmer Dabbelt <[email protected]>2023-09-01 16:09:00 +0000
commit484861e09f3ed8fb2e1de290d9e33fee3611b9fc (patch)
tree32f9ac16121734d7488d1c02adc784f1977b16d4 /tools/perf/builtin-script.c
parentcache: Add L2 cache management for Andes AX45MP RISC-V core (diff)
downloadkernel-484861e09f3ed8fb2e1de290d9e33fee3611b9fc.tar.gz
kernel-484861e09f3ed8fb2e1de290d9e33fee3611b9fc.zip
soc: renesas: Kconfig: Select the required configs for RZ/Five SoC
Explicitly select the required Cache management and Errata configs required for the RZ/Five SoC. Signed-off-by: Lad Prabhakar <[email protected]> Reviewed-by: Conor Dooley <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Acked-by: Geert Uytterhoeven <[email protected]> Tested-by: Conor Dooley <[email protected]> # tyre-kicking on a d1 Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
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