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| author | Maciej W. Rozycki <[email protected]> | 2025-11-13 05:21:10 +0000 |
|---|---|---|
| committer | Thomas Bogendoerfer <[email protected]> | 2025-11-21 12:23:21 +0000 |
| commit | 9f048fa487409e364cf866c957cf0b0d782ca5a3 (patch) | |
| tree | 8d62b930e8a6b15a76fd71e5c04ab07cca6cd970 /tools/lib/traceevent/plugins/plugin_function.c | |
| parent | mips: dts: econet: fix EN751221 core type (diff) | |
| download | kernel-9f048fa487409e364cf866c957cf0b0d782ca5a3.tar.gz kernel-9f048fa487409e364cf866c957cf0b0d782ca5a3.zip | |
MIPS: mm: Prevent a TLB shutdown on initial uniquification
Depending on the particular CPU implementation a TLB shutdown may occur
if multiple matching entries are detected upon the execution of a TLBP
or the TLBWI/TLBWR instructions. Given that we don't know what entries
we have been handed we need to be very careful with the initial TLB
setup and avoid all these instructions.
Therefore read all the TLB entries one by one with the TLBR instruction,
bypassing the content addressing logic, and truncate any large pages in
place so as to avoid a case in the second step where an incoming entry
for a large page at a lower address overlaps with a replacement entry
chosen at another index. Then preinitialize the TLB using addresses
outside our usual unique range and avoiding clashes with any entries
received, before making the usual call to local_flush_tlb_all().
This fixes (at least) R4x00 cores if TLBP hits multiple matching TLB
entries (SGI IP22 PROM for examples sets up all TLBs to the same virtual
address).
Signed-off-by: Maciej W. Rozycki <[email protected]>
Fixes: 35ad7e181541 ("MIPS: mm: tlb-r4k: Uniquify TLB entries on init")
Cc: [email protected]
Reviewed-by: Jiaxun Yang <[email protected]>
Tested-by: Jiaxun Yang <[email protected]> # Boston I6400, M5150 sim
Signed-off-by: Thomas Bogendoerfer <[email protected]>
Diffstat (limited to 'tools/lib/traceevent/plugins/plugin_function.c')
0 files changed, 0 insertions, 0 deletions
