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| author | Stephen Boyd <[email protected]> | 2025-03-07 23:34:59 +0000 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2025-03-07 23:34:59 +0000 |
| commit | fca77a6b21578d51efc895df97a991b560ee318a (patch) | |
| tree | d645c3845a90e5655a3e512ff9f6840f52ca26e6 /security/selinux/hooks.c | |
| parent | Merge tag 'renesas-clk-for-v6.15-tag1' of git://git.kernel.org/pub/scm/linux/... (diff) | |
| parent | clk: renesas: r9a09g047: Add clock and reset signals for the TSU IP (diff) | |
| download | kernel-fca77a6b21578d51efc895df97a991b560ee318a.tar.gz kernel-fca77a6b21578d51efc895df97a991b560ee318a.zip | |
Merge tag 'renesas-clk-for-v6.15-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull more Renesas clk driver updates from Geert Uytterhoeven:
- Add DMA clocks and reset on Renesas RZ/V2H
- Add thermal (TSU) clock and reset on Renesas RZ/G3E
* tag 'renesas-clk-for-v6.15-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: r9a09g047: Add clock and reset signals for the TSU IP
clk: renesas: rzv2h: Adjust for CPG_BUS_m_MSTOP starting from m = 1
clk: renesas: r7s9210: Distinguish clocks by clock type
clk: renesas: rzg2l: Remove unneeded nullify checks
clk: renesas: cpg-mssr: Remove obsolete nullify check
clk: renesas: r9a09g057: Add entries for the DMACs
Diffstat (limited to 'security/selinux/hooks.c')
0 files changed, 0 insertions, 0 deletions