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authorRadim Krčmář <[email protected]>2025-08-12 09:02:55 +0000
committerPaul Walmsley <[email protected]>2025-09-05 21:31:17 +0000
commitad5348c765914766a98ad26cf7a8c28d51a16bdd (patch)
tree7cecc243843d5356732eff1e730ab90797ae7ac8 /scripts/rustdoc_test_builder.rs
parentriscv: uaccess: fix __put_user_nocheck for unaligned accesses (diff)
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riscv, bpf: use lw when reading int cpu in BPF_MOV64_PERCPU_REG
emit_ld is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide. The struct currently has a hole after cpu, so little endian accesses seemed fine. Fixes: 19c56d4e5be1 ("riscv, bpf: add internal-only MOV instruction to resolve per-CPU addrs") Cc: [email protected] Signed-off-by: Radim Krčmář <[email protected]> Reviewed-by: Pu Lehui <[email protected]> Acked-by: Björn Töpel <[email protected]> Tested-by: Björn Töpel <[email protected]> # QEMU Reviewed-by: Alexandre Ghiti <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Paul Walmsley <[email protected]>
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