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| author | Miquel Raynal <[email protected]> | 2024-12-24 17:06:04 +0000 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2025-01-09 20:16:39 +0000 |
| commit | f0006897a96c736623ddeb9b68c3880eb5cdebe7 (patch) | |
| tree | 5e368a8a6f56649a3fccedc886523ca4f5eab89d /scripts/generate_rust_target.rs | |
| parent | spi: spi-mem: Reorder spi-mem macro assignments (diff) | |
| download | kernel-f0006897a96c736623ddeb9b68c3880eb5cdebe7.tar.gz kernel-f0006897a96c736623ddeb9b68c3880eb5cdebe7.zip | |
spi: spi-mem: Create macros for DTR operation
We do have macros for defining command, address, dummy and data
cycles. We also have a .dtr flag that implies sampling the bus on both
edges, but there are currently no macros enabling it. We might make use
of such macros, so let's create:
- SPI_MEM_DTR_OP_CMD
- SPI_MEM_DTR_OP_ADDR
- SPI_MEM_DTR_OP_DUMMY
- SPI_MEM_DTR_OP_DATA_OUT
- SPI_MEM_DTR_OP_DATA_OUT
Signed-off-by: Miquel Raynal <[email protected]>
Link: https://patch.msgid.link/20241224-winbond-6-11-rc1-quad-support-v2-19-ad218dbc406f@bootlin.com
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'scripts/generate_rust_target.rs')
0 files changed, 0 insertions, 0 deletions