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| author | Inochi Amaoto <[email protected]> | 2024-04-11 12:12:40 +0000 |
|---|---|---|
| committer | Palmer Dabbelt <[email protected]> | 2024-05-13 21:26:34 +0000 |
| commit | 92cce91949a497a8a4615f9ba5813b03f7a1f1d5 (patch) | |
| tree | a2423d1b82f828a886704524434d558206abbcbb /scripts/generate_rust_target.rs | |
| parent | Merge patch series "riscv: ASID-related and UP-related TLB flush enhancements" (diff) | |
| download | kernel-92cce91949a497a8a4615f9ba5813b03f7a1f1d5.tar.gz kernel-92cce91949a497a8a4615f9ba5813b03f7a1f1d5.zip | |
riscv: defconfig: Enable CONFIG_CLK_SOPHGO_CV1800
CONFIG_CLK_SOPHGO_CV1800 is required when booting the minimum
system for CV1800 series board.
Signed-off-by: Inochi Amaoto <[email protected]>
Link: https://lore.kernel.org/r/IA1PR20MB49537E8B2D1FAAA7D5B8BDA2BB052@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Palmer Dabbelt <[email protected]>
Diffstat (limited to 'scripts/generate_rust_target.rs')
0 files changed, 0 insertions, 0 deletions