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| author | Bastien Curutchet <[email protected]> | 2025-01-03 08:13:49 +0000 |
|---|---|---|
| committer | Miquel Raynal <[email protected]> | 2025-01-08 18:26:48 +0000 |
| commit | 6df2d9553e168fe32dd49873dd254a63ca913307 (patch) | |
| tree | 34bc5904682bea712a1c054a410340bdcd17344d /scripts/generate_rust_target.rs | |
| parent | mtd: rawnand: qcom: Fix build issue on x86 architecture (diff) | |
| download | kernel-6df2d9553e168fe32dd49873dd254a63ca913307.tar.gz kernel-6df2d9553e168fe32dd49873dd254a63ca913307.zip | |
mtd: rawnand: davinci: Reduce polling interval in NAND_OP_WAITRDY_INSTR
For each NAND_OP_WAITRDY_INSTR operation, the NANDFSR register is
polled only once every 100 us to check for the EMA_WAIT pin. This
isn't frequent enough and causes delays in NAND accesses.
Set the polling interval to 5 us. It increases the page read speed
reported by flash_speed by ~30% (~10% on page writes).
Signed-off-by: Bastien Curutchet <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
Diffstat (limited to 'scripts/generate_rust_target.rs')
0 files changed, 0 insertions, 0 deletions