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| author | Thomas Gleixner <[email protected]> | 2024-02-23 09:07:24 +0000 |
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| committer | Thomas Gleixner <[email protected]> | 2024-02-23 09:07:24 +0000 |
| commit | 129993da1bede32d5c605c46d4ff10384359d385 (patch) | |
| tree | cb182dd67f2593167ed75813087132f11d3b03ce /scripts/generate_rust_target.rs | |
| parent | genirq/irqdomain: Don't call ops->select for DOMAIN_BUS_ANY tokens (diff) | |
| parent | irqchip/riscv-intc: Introduce Andes hart-level interrupt controller (diff) | |
| download | kernel-129993da1bede32d5c605c46d4ff10384359d385.tar.gz kernel-129993da1bede32d5c605c46d4ff10384359d385.zip | |
Merge tag 'irq-for-riscv-02-23-24' into irq/msi
Pick up RISCV INTC changes to handle conflicts with the AIA updates.
Signed-off-by: Thomas Gleixner <[email protected]>
Diffstat (limited to 'scripts/generate_rust_target.rs')
0 files changed, 0 insertions, 0 deletions