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| author | Sergei Shtylyov <[email protected]> | 2016-07-11 21:52:43 +0000 |
|---|---|---|
| committer | Simon Horman <[email protected]> | 2016-07-15 04:22:45 +0000 |
| commit | e0c3f92a08f3e0a95024d0d032564fdc1ee96f54 (patch) | |
| tree | 414ef8cad61e82349b32e0ea405aec3db8a44ce0 /scripts/gcc-plugins/sancov_plugin.c | |
| parent | ARM: dts: r8a7792: add PLL1 divided by 2 clock (diff) | |
| download | kernel-e0c3f92a08f3e0a95024d0d032564fdc1ee96f54.tar.gz kernel-e0c3f92a08f3e0a95024d0d032564fdc1ee96f54.zip | |
ARM: dts: r8a7792: remove ADSP clock
Simon Horman told me that R8A7792 has ADSP clock based on an incorrect
table in the most recent R-Car gen2 manual. But when I received that manual
I discovered that this is false: R8A7792 is the only Gen 2 SoC that doesn't
have ADSP at all. Accordingly remove the ADSP clock from DT for the
r8a7792.
Signed-off-by: Sergei Shtylyov <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Simon Horman <[email protected]>
Diffstat (limited to 'scripts/gcc-plugins/sancov_plugin.c')
0 files changed, 0 insertions, 0 deletions