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| author | Jordan Crouse <[email protected]> | 2017-11-21 19:40:57 +0000 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2018-01-10 13:58:42 +0000 |
| commit | c09513cfebd8d936a7aed3c0302104fb47a4a03a (patch) | |
| tree | 00def9b8aa3880725e4a494ba88139e104fb75a8 /scripts/gcc-plugins/sancov_plugin.c | |
| parent | drm/msm/adreno: Read the speed bins for a5xx targets (diff) | |
| download | kernel-c09513cfebd8d936a7aed3c0302104fb47a4a03a.tar.gz kernel-c09513cfebd8d936a7aed3c0302104fb47a4a03a.zip | |
drm/msm/adreno: a5xx: Explicitly program the CP0 performance counter
Even though the default countable for CP0 is CP_ALWAYS_COUNT (0),
program the selector during HW initialization in an effort to be
up front about which counters are programmed and why.
Signed-off-by: Jordan Crouse <[email protected]>
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'scripts/gcc-plugins/sancov_plugin.c')
0 files changed, 0 insertions, 0 deletions