diff options
| author | Sergej Sawazki <[email protected]> | 2017-09-16 11:44:42 +0000 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2017-12-22 02:09:19 +0000 |
| commit | b26ff127c52c005ac4eb99ebff7bd17c240c2e89 (patch) | |
| tree | dac2abdb49523767791ac8b42b35bde65f4b562a /scripts/gcc-plugins/sancov_plugin.c | |
| parent | clk: si5351: Add DT property to enable PLL reset (diff) | |
| download | kernel-b26ff127c52c005ac4eb99ebff7bd17c240c2e89.tar.gz kernel-b26ff127c52c005ac4eb99ebff7bd17c240c2e89.zip | |
clk: si5351: Apply PLL soft reset before enabling the outputs
The "Si5351A/B/C Data Sheet" states to apply a PLL soft reset before
enabling the output clocks [1]. This is required to get a deterministic
phase relationship between the output clocks.
Without resetting the PLL, the phase relationship between the clocks is
unpredictable. Fix this by resetting the PLL in si5351_clkout_prepare().
References:
[1] https://www.silabs.com/Support%20Documents/TechnicalDocs/Si5351-B.pdf
Figure 12 ("I2C Programming Procedure")
Cc: Sebastian Hesselbarth <[email protected]>
Cc: Rabeeh Khoury <[email protected]>
Cc: Russell King <[email protected]>
Signed-off-by: Sergej Sawazki <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'scripts/gcc-plugins/sancov_plugin.c')
0 files changed, 0 insertions, 0 deletions