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authorNiravkumar L Rabara <[email protected]>2025-05-27 14:57:07 +0000
committerBorislav Petkov (AMD) <[email protected]>2025-05-29 15:38:55 +0000
commite5ef4cd2a47f27c0c9d8ff6c0f63a18937c071a3 (patch)
treec6bdee66f1dea1ad8ef24bceeea3f16c1eeb4485 /scripts/gcc-plugins/randomize_layout_plugin.c
parentMerge tag 'edac_updates_for_v6.16' of git://git.kernel.org/pub/scm/linux/kern... (diff)
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EDAC/altera: Use correct write width with the INTTEST register
On the SoCFPGA platform, the INTTEST register supports only 16-bit writes. A 32-bit write triggers an SError to the CPU so do 16-bit accesses only. [ bp: AI-massage the commit message. ] Fixes: c7b4be8db8bc ("EDAC, altera: Add Arria10 OCRAM ECC support") Signed-off-by: Niravkumar L Rabara <[email protected]> Signed-off-by: Matthew Gerlach <[email protected]> Signed-off-by: Borislav Petkov (AMD) <[email protected]> Acked-by: Dinh Nguyen <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/[email protected]
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