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| author | Kan Liang <[email protected]> | 2020-10-01 21:17:11 +0000 |
|---|---|---|
| committer | Peter Zijlstra <[email protected]> | 2020-10-03 14:30:56 +0000 |
| commit | 80a5ce116fc084e8a25d5a936617699e2931b611 (patch) | |
| tree | 20b77a33768ba881e9d9522171b8481263edcb97 /scripts/gcc-plugins/gcc-generate-simple_ipa-pass.h | |
| parent | perf/x86/intel: Fix Ice Lake event constraint table (diff) | |
| download | kernel-80a5ce116fc084e8a25d5a936617699e2931b611.tar.gz kernel-80a5ce116fc084e8a25d5a936617699e2931b611.zip | |
perf/x86/intel: Check perf metrics feature for each CPU
It might be possible that different CPUs have different CPU metrics on a
platform. In this case, writing the GLOBAL_CTRL_EN_PERF_METRICS bit to
the GLOBAL_CTRL register of a CPU, which doesn't support the TopDown
perf metrics feature, causes MSR access error.
Current TopDown perf metrics feature is enumerated using the boot CPU's
PERF_CAPABILITIES MSR. The MSR only indicates the boot CPU supports this
feature.
Check the PERF_CAPABILITIES MSR for each CPU. If any CPU doesn't support
the perf metrics feature, disable the feature globally.
Fixes: 59a854e2f3b9 ("perf/x86/intel: Support TopDown metrics on Ice Lake")
Signed-off-by: Kan Liang <[email protected]>
Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]
Diffstat (limited to 'scripts/gcc-plugins/gcc-generate-simple_ipa-pass.h')
0 files changed, 0 insertions, 0 deletions